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| author | MITSUNARI Shigeo <[email protected]> | 2018-03-06 15:36:40 +0900 |
|---|---|---|
| committer | MITSUNARI Shigeo <[email protected]> | 2018-03-06 15:36:40 +0900 |
| commit | fe083912c8ac7b7e2b0081cbd6213997bc8b56e6 (patch) | |
| tree | 17eb4912223a72d042978f64a22cac9c25c193ba | |
| parent | f0a8f7faa27121f28186c2a7f4222a9fc66c283d (diff) | |
| download | xbyak-fe083912c8ac7b7e2b0081cbd6213997bc8b56e6.tar.gz xbyak-fe083912c8ac7b7e2b0081cbd6213997bc8b56e6.zip | |
fix to avoid zero division for some virtual machine
| -rw-r--r-- | xbyak/xbyak_util.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xbyak/xbyak_util.h b/xbyak/xbyak_util.h index ca02534..6310860 100644 --- a/xbyak/xbyak_util.h +++ b/xbyak/xbyak_util.h @@ -132,7 +132,7 @@ class Cpu { * (extractBit(data[1], 0, 11) + 1) * (data[2] + 1); if (cacheType == DATA_CACHE && smt_width == 0) smt_width = nb_logical_cores; - assert(smt_width != 0); + if (smt_width == 0) smt_width = 1; // avoid possibility of zero division cores_sharing_data_cache[data_cache_levels] = nb_logical_cores / smt_width; data_cache_levels++; } |