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authorMITSUNARI Shigeo <[email protected]>2019-02-14 11:13:15 +0900
committerMITSUNARI Shigeo <[email protected]>2019-02-14 11:13:15 +0900
commitaf5f422efca105cc8f3251e2dec032f5f05a46c2 (patch)
tree6574d973c609b121c375043d4f5e93f01486e017
parentdd4173e10403ea7b3e9f3f4903c8c6521374cb9f (diff)
parent9b98dc17f5eb00d8ab8ba0ba1fe6762d1dd46f07 (diff)
downloadxbyak-af5f422efca105cc8f3251e2dec032f5f05a46c2.tar.gz
xbyak-af5f422efca105cc8f3251e2dec032f5f05a46c2.zip
Merge branch 'fenghaitao-guard_x86' into develop
-rw-r--r--xbyak/xbyak_util.h23
1 files changed, 19 insertions, 4 deletions
diff --git a/xbyak/xbyak_util.h b/xbyak/xbyak_util.h
index 056ad77..45811bb 100644
--- a/xbyak/xbyak_util.h
+++ b/xbyak/xbyak_util.h
@@ -9,6 +9,7 @@
*/
#include "xbyak.h"
+#if defined(__i386__) || defined(__x86_64__)
#ifdef _MSC_VER
#if (_MSC_VER < 1400) && defined(XBYAK32)
static inline __declspec(naked) void __cpuid(int[4], int)
@@ -47,6 +48,7 @@
#endif
#endif
#endif
+#endif
namespace Xbyak { namespace util {
@@ -80,7 +82,7 @@ class Cpu {
}
void setFamily()
{
- unsigned int data[4];
+ unsigned int data[4] = {0};
getCpuid(1, data);
stepping = data[0] & mask(4);
model = (data[0] >> 4) & mask(4);
@@ -107,7 +109,7 @@ class Cpu {
{
if ((type_ & tINTEL) == 0) return;
- unsigned int data[4];
+ unsigned int data[4] = {0};
/* CAUTION: These numbers are configuration as shipped by Intel. */
getCpuidEx(0x0, 0, data);
@@ -148,7 +150,7 @@ class Cpu {
const unsigned int UNIFIED_CACHE = 3;
unsigned int smt_width = 0;
unsigned int logical_cores = 0;
- unsigned int data[4];
+ unsigned int data[4] = {0};
if (x2APIC_supported_) {
smt_width = numCores_[0];
@@ -219,22 +221,27 @@ public:
*/
static inline void getCpuid(unsigned int eaxIn, unsigned int data[4])
{
+#if defined(__i386__) || defined(__x86_64__)
#ifdef _MSC_VER
__cpuid(reinterpret_cast<int*>(data), eaxIn);
#else
__cpuid(eaxIn, data[0], data[1], data[2], data[3]);
#endif
+#endif
}
static inline void getCpuidEx(unsigned int eaxIn, unsigned int ecxIn, unsigned int data[4])
{
+#if defined(__i386__) || defined(__x86_64__)
#ifdef _MSC_VER
__cpuidex(reinterpret_cast<int*>(data), eaxIn, ecxIn);
#else
__cpuid_count(eaxIn, ecxIn, data[0], data[1], data[2], data[3]);
#endif
+#endif
}
static inline uint64 getXfeature()
{
+#if defined(__i386__) || defined(__x86_64__)
#ifdef _MSC_VER
return _xgetbv(0);
#else
@@ -244,6 +251,9 @@ public:
__asm__ volatile(".byte 0x0f, 0x01, 0xd0" : "=a"(eax), "=d"(edx) : "c"(0));
return ((uint64)edx << 32) | eax;
#endif
+#else // defined(__i386__) || defined(__x86_64__)
+ return 0;
+#endif
}
typedef uint64 Type;
@@ -319,7 +329,7 @@ public:
, coresSharignDataCache_()
, dataCacheLevels_(0)
{
- unsigned int data[4];
+ unsigned int data[4] = {0};
const unsigned int& EAX = data[0];
const unsigned int& EBX = data[1];
const unsigned int& ECX = data[2];
@@ -428,6 +438,7 @@ class Clock {
public:
static inline uint64 getRdtsc()
{
+#if defined(__i386__) || defined(__x86_64__)
#ifdef _MSC_VER
return __rdtsc();
#else
@@ -435,6 +446,10 @@ public:
__asm__ volatile("rdtsc" : "=a"(eax), "=d"(edx));
return ((uint64)edx << 32) | eax;
#endif
+#else // defined(__i386__) || defined(__x86_64__)
+ // TODO: Need another impl of Clock or rdtsc-equivalent for non-x86 cpu
+ return 0;
+#endif
}
Clock()
: clock_(0)