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| author | MITSUNARI Shigeo <[email protected]> | 2022-11-25 17:31:34 +0900 |
|---|---|---|
| committer | MITSUNARI Shigeo <[email protected]> | 2022-11-25 17:31:34 +0900 |
| commit | 0f2f1aaa650c6def3bb0c3ecb15276a2e2ae35e0 (patch) | |
| tree | 46e124b2237ae6d9ff82905f965376641c50efca | |
| parent | 6c047f48081806b89a6e7fa6a1bde663096d6ce3 (diff) | |
| download | xbyak-0f2f1aaa650c6def3bb0c3ecb15276a2e2ae35e0.tar.gz xbyak-0f2f1aaa650c6def3bb0c3ecb15276a2e2ae35e0.zip | |
support rio-int
| -rw-r--r-- | gen/gen_code.cpp | 17 | ||||
| -rw-r--r-- | xbyak/xbyak_mnemonic.h | 4 |
2 files changed, 21 insertions, 0 deletions
diff --git a/gen/gen_code.cpp b/gen/gen_code.cpp index b89009b..7a5c575 100644 --- a/gen/gen_code.cpp +++ b/gen/gen_code.cpp @@ -807,6 +807,23 @@ void put() printf("void %s(const Operand& op, uint32_t imm) { opRM_I(op, imm, 0x%02X, %d); }\n", p->name, p->code, p->ext); } } + { + const struct Tbl { + const char *name; + uint8_t prefix; + } tbl[] = { + { "aadd", 0 }, + { "aand", 0x66 }, + { "aor", 0xF2 }, + { "axor", 0xF3 }, + }; + for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) { + const Tbl *p = &tbl[i]; + printf("void %s(const Address& addr, const Reg32e ®) { ", p->name); + if (p->prefix) printf("db(0x%02X); ", p->prefix); + printf("opModM(addr, reg, 0x0F, 0x38, 0x0FC); }\n"); + } + } { const struct Tbl { diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h index 33bd5c0..84d83cb 100644 --- a/xbyak/xbyak_mnemonic.h +++ b/xbyak/xbyak_mnemonic.h @@ -1,4 +1,6 @@ const char *getVersionString() const { return "6.65"; } +void aadd(const Address& addr, const Reg32e ®) { opModM(addr, reg, 0x0F, 0x38, 0x0FC); } +void aand(const Address& addr, const Reg32e ®) { db(0x66); opModM(addr, reg, 0x0F, 0x38, 0x0FC); } void adc(const Operand& op, uint32_t imm) { opRM_I(op, imm, 0x10, 2); } void adc(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x10); } void adcx(const Reg32e& reg, const Operand& op) { opGen(reg, op, 0xF6, 0x66, isREG32_REG32orMEM, NONE, 0x38); } @@ -24,6 +26,8 @@ void andnpd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x55, 0x66, isXM void andnps(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x55, 0x100, isXMM_XMMorMEM); } void andpd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x54, 0x66, isXMM_XMMorMEM); } void andps(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x54, 0x100, isXMM_XMMorMEM); } +void aor(const Address& addr, const Reg32e ®) { db(0xF2); opModM(addr, reg, 0x0F, 0x38, 0x0FC); } +void axor(const Address& addr, const Reg32e ®) { db(0xF3); opModM(addr, reg, 0x0F, 0x38, 0x0FC); } void bextr(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opGpr(r1, op, r2, T_0F38, 0xf7, false); } void blendpd(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x0D, 0x66, isXMM_XMMorMEM, static_cast<uint8_t>(imm), 0x3A); } void blendps(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x0C, 0x66, isXMM_XMMorMEM, static_cast<uint8_t>(imm), 0x3A); } |