Age | Commit message (Collapse) | Author | |
---|---|---|---|
2024-03-02 | backend/rv64: Implement GetNZCVFromOp | Yang Liu | |
2024-03-02 | backend/rv64: Implement basic Sub32 | Yang Liu | |
2024-03-02 | backend/rv64: Implement Identity | Yang Liu | |
2024-03-02 | backend/rv64: Initial implementation of terminals | Yang Liu | |
2024-03-02 | backend/rv64: Add StackLayout to stack | Yang Liu | |
2024-03-02 | backend/rv64: Implement UpdateAllUses | Yang Liu | |
2024-03-02 | backend/rv64: Implement AssertNoMoreUses and some minor tweaks | Yang Liu | |
2024-03-02 | backend/rv64: Use biscuit LI() | Yang Liu | |
2024-03-02 | backend/rv64: Add minimal toy implementation enough to execute LSLS | Yang Liu | |
2024-03-02 | backend/rv64: Initial implementation of register allocator | Yang Liu | |
2024-03-02 | backend/rv64: Adjust how relocations are stored | Yang Liu | |
2024-03-02 | backend/rv64: Rework on pointer types | Yang Liu | |
2024-03-02 | backend/rv64: Add a dummy code generation | Yang Liu | |
2024-03-02 | backend/rv64: Add biscuit as the assembler | Yang Liu | |
2024-03-02 | backend/rv64: Add initial RISC-V framework | Yang Liu | |
RISC-V target is now compilable. | |||
2024-03-02 | Change Config to make fastmem_pointer of zero valid. | Ash | |
This changes Dynarmic::A32/A64::Config to store fastmem_pointer in a std::optional<uintptr_t>, allowing the user to pass a zero base address for the guest memory, which can be used to effectively implement a shared address space between the host and the guest. | |||
2024-02-24 | emit_x64_vector: Implement AVX2 AVShift64 | zmt00 | |
2024-02-24 | emit_x64_vector: Refactor AVX2 AVShift32, LVShift{32,64} | zmt00 | |
2024-02-20 | emit_x64_vector: Implement AVX2 UnsignedRoundingShiftLeft{32,64} | zmt00 | |
2024-02-17 | emit_x64_vector: Refactor pre-SSE4.1 min/max instruction replacements | zmt00 | |
2024-02-13 | emit_x64_vector: Optimize VectorSignedSaturatedAbs | zmt00 | |
2024-02-13 | backend/arm64: A64: Implement DumpDisassembly | Merry | |
2024-02-13 | emit_arm64_a64: Take into account currently loaded FPSR | Merry | |
Previously we just retrieved the last stored FPSR and used that when the guest asks for the current FPSR. This is incorrect behaviour. We failed to take into account the current state of the host FPSR. Here we take this into account. This bug was discovered via #795. | |||
2024-02-10 | backend/x64: Reduce races on invalidation requests in interface | Merry | |
This situation occurs when RequestCacheInvalidation is called from multiple threads. This results in unusual issues around memory allocation which arise from concurrent access to invalid_cache_ranges. There are several reasons for this: 1. No locking around the invalidation queue. 2. is_executing is not multithread safe. So here we reduce any cache clear or any invalidation to raise a CacheInvalidation halt, which we execute immediately before or immediately after Run() instead. | |||
2024-02-10 | emit_x64_vector: AVX512+GNFI implementation of EmitVectorLogicalVShift8 | Wunkolo | |
2024-02-10 | ir: Implement FPMulSub | zmt00 | |
2024-02-06 | emit_x64_vector: GNFI implementation of EmitVectorCountLeadingZeros8 | Wunkolo | |
2024-01-31 | emit_x64_data_processing: Exclude edge case from lea path in EmitSub | Merry | |
-0xffff'ffff'8000'0000 = 0x0000'0000'8000'0000 which is not a representable displacement | |||
2024-01-30 | constant_propagation_pass: x + 0 == x | Merry | |
2024-01-30 | emit_x64_data_processing: Emit lea where possible in EmitAdd and EmitSub | Merry | |
2024-01-30 | Avoid emplace. | Merry | |
2024-01-30 | emit_x64_vector: Improve AVX512 implementation of EmitVectorTableLookup128 | Merry | |
2024-01-30 | emit_x64_vector: Fix AVX-512 implementation of EmitVectorTableLookup64 | Merry | |
2024-01-29 | emit_x64_crc32: Correct use of x64 crc32 instruction | Merry | |
CRC32 r32, r/m64 variant does not exist, but CRC r64, r/m64 does what we want. | |||
2024-01-28 | emit_x64_vector: Implement PairedMinMax{Lower}8 | zmt00 | |
2024-01-28 | externals: Update oaknut to 2.0.1 | Merry | |
Merge commit 'a37f3673f8ca59a0c7046616247db1c6bc00e131' | |||
2024-01-28 | backend/arm64: Update for oaknut 2.0.0. | Merry | |
Also respect DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT. | |||
2024-01-28 | A32: Implement VCVT{A,N,P,M} (ASIMD) | Merry | |
2024-01-28 | A32: Correct function naming convention for VRINT{N,X,A,Z,M,P} (ASIMD) | Merry | |
2024-01-28 | backend/arm64: FPVectorRoundInt{32,64}: FPCR comparisons should be made with ↵ | Merry | |
fpcr_controlled when under scope of MaybeStandardFPSCRValue | |||
2024-01-28 | A32: Implement VRINT{N,X,A,Z,M,P} (ASIMD) | Merry | |
2024-01-27 | arm64: Fix compiling under MSYS2 CLANGARM64. | Steveice10 | |
2024-01-23 | Refactor `Xmm{B}Const` to `{,B}Const` | Wunkolo | |
2024-01-23 | block_of_code: Add `XmmBConst` | Wunkolo | |
This is a redo of https://github.com/merryhime/dynarmic/pull/690 with a much smaller foot-print to introduce a new pattern while avoiding the initial bugs (https://github.com/merryhime/dynarmic/commit/5d9b720189a64eec7f35f844320d0b30ca3997f3) **B**roadcasts a value as an **Xmm**-sized **Const**ant. Intended to eventually encourage more hits within the constant-pool between vector and non-vector code. | |||
2024-01-23 | block_of_code: Rename `MConst` to `XmmConst` | Wunkolo | |
`MConst` is refactored into `XmmConst` to clearly communicate the addressable space of the newly allocated 16-byte memory constant. | |||
2024-01-23 | emit_x64_vector: Optimize VectorSignedAbsoluteDifference | zmt00 | |
2024-01-13 | decoder/arm: Improve performance of arm decoding by adding LUT | Merry | |
2024-01-10 | emit_x64_vector: Implement PairedMinMax{Lower}16 | zmt00 | |
2024-01-09 | ir_emitter: Fix CallHostFunction | merry | |
2024-01-02 | emit_x64_vector: Implement SSE4.1 PairedMinMaxLower32 | zmt00 | |