aboutsummaryrefslogtreecommitdiffhomepage
path: root/src
AgeCommit message (Collapse)Author
2024-03-02backend/rv64: Implement GetNZCVFromOpYang Liu
2024-03-02backend/rv64: Implement basic Sub32Yang Liu
2024-03-02backend/rv64: Implement IdentityYang Liu
2024-03-02backend/rv64: Initial implementation of terminalsYang Liu
2024-03-02backend/rv64: Add StackLayout to stackYang Liu
2024-03-02backend/rv64: Implement UpdateAllUsesYang Liu
2024-03-02backend/rv64: Implement AssertNoMoreUses and some minor tweaksYang Liu
2024-03-02backend/rv64: Use biscuit LI()Yang Liu
2024-03-02backend/rv64: Add minimal toy implementation enough to execute LSLSYang Liu
2024-03-02backend/rv64: Initial implementation of register allocatorYang Liu
2024-03-02backend/rv64: Adjust how relocations are storedYang Liu
2024-03-02backend/rv64: Rework on pointer typesYang Liu
2024-03-02backend/rv64: Add a dummy code generationYang Liu
2024-03-02backend/rv64: Add biscuit as the assemblerYang Liu
2024-03-02backend/rv64: Add initial RISC-V frameworkYang Liu
RISC-V target is now compilable.
2024-03-02Change Config to make fastmem_pointer of zero valid.Ash
This changes Dynarmic::A32/A64::Config to store fastmem_pointer in a std::optional<uintptr_t>, allowing the user to pass a zero base address for the guest memory, which can be used to effectively implement a shared address space between the host and the guest.
2024-02-24emit_x64_vector: Implement AVX2 AVShift64zmt00
2024-02-24emit_x64_vector: Refactor AVX2 AVShift32, LVShift{32,64}zmt00
2024-02-20emit_x64_vector: Implement AVX2 UnsignedRoundingShiftLeft{32,64}zmt00
2024-02-17emit_x64_vector: Refactor pre-SSE4.1 min/max instruction replacementszmt00
2024-02-13emit_x64_vector: Optimize VectorSignedSaturatedAbszmt00
2024-02-13backend/arm64: A64: Implement DumpDisassemblyMerry
2024-02-13emit_arm64_a64: Take into account currently loaded FPSRMerry
Previously we just retrieved the last stored FPSR and used that when the guest asks for the current FPSR. This is incorrect behaviour. We failed to take into account the current state of the host FPSR. Here we take this into account. This bug was discovered via #795.
2024-02-10backend/x64: Reduce races on invalidation requests in interfaceMerry
This situation occurs when RequestCacheInvalidation is called from multiple threads. This results in unusual issues around memory allocation which arise from concurrent access to invalid_cache_ranges. There are several reasons for this: 1. No locking around the invalidation queue. 2. is_executing is not multithread safe. So here we reduce any cache clear or any invalidation to raise a CacheInvalidation halt, which we execute immediately before or immediately after Run() instead.
2024-02-10emit_x64_vector: AVX512+GNFI implementation of EmitVectorLogicalVShift8Wunkolo
2024-02-10ir: Implement FPMulSubzmt00
2024-02-06emit_x64_vector: GNFI implementation of EmitVectorCountLeadingZeros8Wunkolo
2024-01-31emit_x64_data_processing: Exclude edge case from lea path in EmitSubMerry
-0xffff'ffff'8000'0000 = 0x0000'0000'8000'0000 which is not a representable displacement
2024-01-30constant_propagation_pass: x + 0 == xMerry
2024-01-30emit_x64_data_processing: Emit lea where possible in EmitAdd and EmitSubMerry
2024-01-30Avoid emplace.Merry
2024-01-30emit_x64_vector: Improve AVX512 implementation of EmitVectorTableLookup128Merry
2024-01-30emit_x64_vector: Fix AVX-512 implementation of EmitVectorTableLookup64Merry
2024-01-29emit_x64_crc32: Correct use of x64 crc32 instructionMerry
CRC32 r32, r/m64 variant does not exist, but CRC r64, r/m64 does what we want.
2024-01-28emit_x64_vector: Implement PairedMinMax{Lower}8zmt00
2024-01-28externals: Update oaknut to 2.0.1Merry
Merge commit 'a37f3673f8ca59a0c7046616247db1c6bc00e131'
2024-01-28backend/arm64: Update for oaknut 2.0.0.Merry
Also respect DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT.
2024-01-28A32: Implement VCVT{A,N,P,M} (ASIMD)Merry
2024-01-28A32: Correct function naming convention for VRINT{N,X,A,Z,M,P} (ASIMD)Merry
2024-01-28backend/arm64: FPVectorRoundInt{32,64}: FPCR comparisons should be made with ↵Merry
fpcr_controlled when under scope of MaybeStandardFPSCRValue
2024-01-28A32: Implement VRINT{N,X,A,Z,M,P} (ASIMD)Merry
2024-01-27arm64: Fix compiling under MSYS2 CLANGARM64.Steveice10
2024-01-23Refactor `Xmm{B}Const` to `{,B}Const`Wunkolo
2024-01-23block_of_code: Add `XmmBConst`Wunkolo
This is a redo of https://github.com/merryhime/dynarmic/pull/690 with a much smaller foot-print to introduce a new pattern while avoiding the initial bugs (https://github.com/merryhime/dynarmic/commit/5d9b720189a64eec7f35f844320d0b30ca3997f3) **B**roadcasts a value as an **Xmm**-sized **Const**ant. Intended to eventually encourage more hits within the constant-pool between vector and non-vector code.
2024-01-23block_of_code: Rename `MConst` to `XmmConst`Wunkolo
`MConst` is refactored into `XmmConst` to clearly communicate the addressable space of the newly allocated 16-byte memory constant.
2024-01-23emit_x64_vector: Optimize VectorSignedAbsoluteDifferencezmt00
2024-01-13decoder/arm: Improve performance of arm decoding by adding LUTMerry
2024-01-10emit_x64_vector: Implement PairedMinMax{Lower}16zmt00
2024-01-09ir_emitter: Fix CallHostFunctionmerry
2024-01-02emit_x64_vector: Implement SSE4.1 PairedMinMaxLower32zmt00