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| author | Kenneth Bell <[email protected]> | 2021-04-12 20:05:41 -0700 |
|---|---|---|
| committer | Ron Evans <[email protected]> | 2021-04-13 07:38:30 +0200 |
| commit | ae59e7703e95e5109dc9f8e2d4e72951a3ca02e9 (patch) | |
| tree | 3a5ec2cd813eacef90c2bbb5961ba59dee916c99 | |
| parent | e587b1d1b4031a7bed960d94122a5d243229f090 (diff) | |
| download | tinygo-ae59e7703e95e5109dc9f8e2d4e72951a3ca02e9.tar.gz tinygo-ae59e7703e95e5109dc9f8e2d4e72951a3ca02e9.zip | |
stm32: make SPI CLK fast to fix data issue
See "STM32F40x and STM32F41x Errata sheet" - SPI CLK port must be 'fast' or 'very fast' to avoid data corruption on last bit (at the APB clocks we configure).
| -rw-r--r-- | src/machine/machine_stm32_moder_gpio.go | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/machine/machine_stm32_moder_gpio.go b/src/machine/machine_stm32_moder_gpio.go index be4d636fc..2b3da819d 100644 --- a/src/machine/machine_stm32_moder_gpio.go +++ b/src/machine/machine_stm32_moder_gpio.go @@ -55,9 +55,11 @@ const ( gpioPullMask = 0x3 // OSPEED bitfields. - gpioOutputSpeedHigh = 2 - gpioOutputSpeedLow = 0 - gpioOutputSpeedMask = 0x3 + gpioOutputSpeedVeryHigh = 3 + gpioOutputSpeedHigh = 2 + gpioOutputSpeedMedium = 1 + gpioOutputSpeedLow = 0 + gpioOutputSpeedMask = 0x3 ) // Configure this pin with the given configuration @@ -120,7 +122,7 @@ func (p Pin) ConfigureAltFunc(config PinConfig, altFunc uint8) { // SPI case PinModeSPICLK: port.MODER.ReplaceBits(gpioModeAlternate, gpioModeMask, pos) - port.OSPEEDR.ReplaceBits(gpioOutputSpeedLow, gpioOutputSpeedMask, pos) + port.OSPEEDR.ReplaceBits(gpioOutputSpeedHigh, gpioOutputSpeedMask, pos) port.PUPDR.ReplaceBits(gpioPullFloating, gpioPullMask, pos) p.SetAltFunc(altFunc) case PinModeSPISDO: |