riscv: fix offset in 64bit scheduler

Also keep common start.S file for 64 and 32 bit architectures.

7 files changed, 65 insertions, 79 deletions

diff --git a/src/device/riscv/handleinterrupt32.S b/src/device/riscv/handleinterrupt32.S
new file mode 100644
index 000000000..4358977ae
--- /dev/null
+++ b/src/device/riscv/handleinterrupt32.S
@@ -0,0 +1,44 @@
+.section .text.handleInterruptASM
+.global handleInterruptASM
+.type handleInterruptASM,@function
+handleInterruptASM:
+    // Save and restore all registers, because the hardware only saves/restores
+    // the pc.
+    // Note: we have to do this in assembly because the "interrupt"="machine"
+    // attribute is broken in LLVM: https://bugs.llvm.org/show_bug.cgi?id=42984
+    addi    sp, sp, -64
+    sw      ra, 60(sp)
+    sw      t0, 56(sp)
+    sw      t1, 52(sp)
+    sw      t2, 48(sp)
+    sw      a0, 44(sp)
+    sw      a1, 40(sp)
+    sw      a2, 36(sp)
+    sw      a3, 32(sp)
+    sw      a4, 28(sp)
+    sw      a5, 24(sp)
+    sw      a6, 20(sp)
+    sw      a7, 16(sp)
+    sw      t3, 12(sp)
+    sw      t4, 8(sp)
+    sw      t5, 4(sp)
+    sw      t6, 0(sp)
+    call    handleInterrupt
+    lw      t6, 0(sp)
+    lw      t5, 4(sp)
+    lw      t4, 8(sp)
+    lw      t3, 12(sp)
+    lw      a7, 16(sp)
+    lw      a6, 20(sp)
+    lw      a5, 24(sp)
+    lw      a4, 28(sp)
+    lw      a3, 32(sp)
+    lw      a2, 36(sp)
+    lw      a1, 40(sp)
+    lw      a0, 44(sp)
+    lw      t2, 48(sp)
+    lw      t1, 52(sp)
+    lw      t0, 56(sp)
+    lw      ra, 60(sp)
+    addi    sp, sp, 64
+    mret
diff --git a/src/device/riscv/start64.S b/src/device/riscv/handleinterrupt64.S
index b21bfb13a..e0c6a3bf5 100644
--- a/src/device/riscv/start64.S
+++ b/src/device/riscv/handleinterrupt64.S
@@ -1,19 +1,3 @@
-.section .init
-.global _start
-.type _start,@function
-
-_start:
-    // Load the stack pointer.
-    la sp,      _stack_top
-
-    // Load the globals pointer. The program will load pointers relative to this
-    // register, so it must be set to the right value on startup.
-    // See: https://gnu-mcu-eclipse.github.io/arch/riscv/programmer/#the-gp-global-pointer-register
-    la gp,      __global_pointer$
-
-    // Jump to runtime.main
-    call main
-
 .section .text.handleInterruptASM
 .global handleInterruptASM
 .type handleInterruptASM,@function
diff --git a/src/device/riscv/start.S b/src/device/riscv/start.S
index 06c9c4a2e..eee57fee7 100644
--- a/src/device/riscv/start.S
+++ b/src/device/riscv/start.S
@@ -13,48 +13,3 @@ _start:
 
     // Jump to runtime.main
     call main
-
-.section .text.handleInterruptASM
-.global handleInterruptASM
-.type handleInterruptASM,@function
-handleInterruptASM:
-    // Save and restore all registers, because the hardware only saves/restores
-    // the pc.
-    // Note: we have to do this in assembly because the "interrupt"="machine"
-    // attribute is broken in LLVM: https://bugs.llvm.org/show_bug.cgi?id=42984
-    addi    sp, sp, -64
-    sw      ra, 60(sp)
-    sw      t0, 56(sp)
-    sw      t1, 52(sp)
-    sw      t2, 48(sp)
-    sw      a0, 44(sp)
-    sw      a1, 40(sp)
-    sw      a2, 36(sp)
-    sw      a3, 32(sp)
-    sw      a4, 28(sp)
-    sw      a5, 24(sp)
-    sw      a6, 20(sp)
-    sw      a7, 16(sp)
-    sw      t3, 12(sp)
-    sw      t4, 8(sp)
-    sw      t5, 4(sp)
-    sw      t6, 0(sp)
-    call    handleInterrupt
-    lw      t6, 0(sp)
-    lw      t5, 4(sp)
-    lw      t4, 8(sp)
-    lw      t3, 12(sp)
-    lw      a7, 16(sp)
-    lw      a6, 20(sp)
-    lw      a5, 24(sp)
-    lw      a4, 28(sp)
-    lw      a3, 32(sp)
-    lw      a2, 36(sp)
-    lw      a1, 40(sp)
-    lw      a0, 44(sp)
-    lw      t2, 48(sp)
-    lw      t1, 52(sp)
-    lw      t0, 56(sp)
-    lw      ra, 60(sp)
-    addi    sp, sp, 64
-    mret
diff --git a/src/runtime/scheduler_tinygoriscv64.S b/src/runtime/scheduler_tinygoriscv64.S
index 204f964f7..84be3e2de 100644
--- a/src/runtime/scheduler_tinygoriscv64.S
+++ b/src/runtime/scheduler_tinygoriscv64.S
@@ -3,30 +3,30 @@
 .type    tinygo_scanCurrentStack, %function
 tinygo_scanCurrentStack:
    // Push callee-saved registers onto the stack.
-   addi sp, sp, -128
-   sd ra,  120(sp)
-   sd s11, 112(sp)
-   sd s10, 104(sp)
-   sd s9,  96(sp)
-   sd s8,  88(sp)
-   sd s7,  80(sp)
-   sd s6,  72(sp)
-   sd s5,  64(sp)
-   sd s4,  56(sp)
-   sd s3,  48(sp)
-   sd s2,  40(sp)
-   sd s1,  32(sp)
-   sd s0,  24(sp)
+   addi sp, sp, -104
+   sd ra,  96(sp)
+   sd s11, 88(sp)
+   sd s10, 80(sp)
+   sd s9,  72(sp)
+   sd s8,  64(sp)
+   sd s7,  56(sp)
+   sd s6,  48(sp)
+   sd s5,  40(sp)
+   sd s4,  32(sp)
+   sd s3,  24(sp)
+   sd s2,  16(sp)
+   sd s1,  8(sp)
+   sd s0,  0(sp)
 
    // Scan the stack.
    mv a0, sp
    call tinygo_scanstack
 
    // Restore return address.
-   ld ra, 60(sp)
+   ld ra, 96(sp)
 
    // Restore stack state.
-   addi sp, sp, 128
+   addi sp, sp, 104
 
    // Return to the caller.
    ret
diff --git a/targets/riscv.json b/targets/riscv.json
index d78026b34..a2d4aaeb6 100644
--- a/targets/riscv.json
+++ b/targets/riscv.json
@@ -16,5 +16,8 @@
 	"ldflags": [
 		"--gc-sections"
 	],
+	"extra-files": [
+		"src/device/riscv/start.S"
+	],
 	"gdb": "riscv64-unknown-elf-gdb"
 }
diff --git a/targets/riscv32.json b/targets/riscv32.json
index 4fd0d6426..fb1bdb94f 100644
--- a/targets/riscv32.json
+++ b/targets/riscv32.json
@@ -12,6 +12,6 @@
 	],
 	"extra-files": [
 		"src/runtime/scheduler_tinygoriscv.S",
-		"src/device/riscv/start.S"
+		"src/device/riscv/handleinterrupt32.S"
 	]
 }
diff --git a/targets/riscv64.json b/targets/riscv64.json
index ec5cb5030..20c7f1baf 100644
--- a/targets/riscv64.json
+++ b/targets/riscv64.json
@@ -12,6 +12,6 @@
 	],
 	"extra-files": [
 		"src/runtime/scheduler_tinygoriscv64.S",
-		"src/device/riscv/start64.S"
+		"src/device/riscv/handleinterrupt64.S"
 	]
 }