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| author | Ayke van Laethem <[email protected]> | 2019-03-30 12:54:36 +0100 |
|---|---|---|
| committer | Ron Evans <[email protected]> | 2019-07-07 14:03:24 +0200 |
| commit | ffa38b183b32331dd247e337a985c4eb5a7d9350 (patch) | |
| tree | 2f858af25739909e2da7f6b0b3e59eacc5071d41 /compiler/inlineasm.go | |
| parent | f0eb4eef5a842be56288590ef3ba8766432c67ac (diff) | |
| download | tinygo-ffa38b183b32331dd247e337a985c4eb5a7d9350.tar.gz tinygo-ffa38b183b32331dd247e337a985c4eb5a7d9350.zip | |
all: add HiFive1 rev B board with RISC-V architecture
This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
Diffstat (limited to 'compiler/inlineasm.go')
| -rw-r--r-- | compiler/inlineasm.go | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/compiler/inlineasm.go b/compiler/inlineasm.go index b832e43a1..f5dbc9f8a 100644 --- a/compiler/inlineasm.go +++ b/compiler/inlineasm.go @@ -18,10 +18,19 @@ import ( // func ReadRegister(name string) uintptr // // The register name must be a constant, for example "sp". -func (c *Compiler) emitReadRegister(args []ssa.Value) (llvm.Value, error) { +func (c *Compiler) emitReadRegister(name string, args []ssa.Value) (llvm.Value, error) { fnType := llvm.FunctionType(c.uintptrType, []llvm.Type{}, false) regname := constant.StringVal(args[0].(*ssa.Const).Value) - target := llvm.InlineAsm(fnType, "mov $0, "+regname, "=r", false, false, 0) + var asm string + switch name { + case "device/arm.ReadRegister": + asm = "mov $0, " + regname + case "device/riscv.ReadRegister": + asm = "mv $0, " + regname + default: + panic("unknown architecture") + } + target := llvm.InlineAsm(fnType, asm, "=r", false, false, 0) return c.builder.CreateCall(target, nil, ""), nil } |