tinygo - Go compiler for small places. Microcontrollers, WebAssembly (WASM/WASI), and command-line tools. Based on LLVM.

Age	Commit message (Expand)	Author
2024-04-19	Run Nick G's spellchecker github.com/client9/misspell, carefuly fix what it f...	dkegel-fastly
2023-02-19	runtime: check for heap allocations inside interrupts	Ayke van Laethem
2022-12-19	build: drop deprecated build tags	Yurii Soldak
2022-07-05	serial: use common initialization for serial	sago35
2022-06-01	os, runtime: enable os.Stdin for baremetal target	sago35
2022-02-04	all: update build constraints to Go 1.17	Ayke van Laethem
2022-01-02	avr: fix time.Sleep() in init code	Ayke van Laethem
2021-11-06	transform: refactor interrupt lowering	Ayke van Laethem
2021-10-21	fe310: increase CPU frequency from 16MHz to 320MHz	Ayke van Laethem
2021-10-06	qemu: signal correct exit code to QEMU	Ayke van Laethem
2021-05-13	machine: define Serial as the default output	Ayke van Laethem
2021-05-08	runtime: remove the asyncScheduler constant	Ayke van Laethem
2020-06-07	Zero PLIC threshold value at startup	Yannis Huber
2020-04-05	all: change //go:export to //export	Ayke van Laethem
2020-03-26	riscv: implement VirtIO target	Ayke van Laethem
2020-03-17	generalize -scheduler=none to support most platforms	Jaden Weiss
2020-03-17	refactor coroutine lowering and tasks	Jaden Weiss
2020-01-27	runtime: fix external address declarations	Ayke van Laethem
2020-01-27	runtime/fe310: add support for PLIC interrupts	Ayke van Laethem
2020-01-27	runtime/fe310: do peripheral initialization in an explicit call	Ayke van Laethem
2020-01-11	riscv: print exception PC and code	Ayke van Laethem
2020-01-10	riscv: add bare-bones interrupt support	Ayke van Laethem
2020-01-10	runtime/hifive1: use CLINT peripheral for timekeeping	Ayke van Laethem
2019-12-26	riscv: support sleeping in QEMU	Ayke van Laethem
2019-12-07	targets: add hifive1-qemu for testing RISC-V bare metal in QEMU	Ayke van Laethem
2019-10-09	machine/hifive1: add GPIO Get() implementation and update other implementatio...	Ron Evans
2019-08-05	runtime: work around a bug in LLVM for .bss zeroing	Ayke van Laethem
2019-07-07	all: add HiFive1 rev B board with RISC-V architecture	Ayke van Laethem