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path: root/targets/fe310.json
AgeCommit message (Expand)Author
2024-05-24LLVM 18 supportAyke van Laethem
2024-01-05all: statically link to LLVM 17 instead of LLVM 16Ayke van Laethem
2023-09-18all: switch to LLVM 16Ayke van Laethem
2022-10-19ci: add support for LLVM 15Ayke van Laethem
2022-04-23all: update to LLVM 14Ayke van Laethem
2021-11-07all: add target-features string to all targetsAyke van Laethem
2021-11-03targets: add CPU property everywhereAyke van Laethem
2020-07-08Changes according to @aykevl's feedbackYannis Huber
2020-07-08Split RISC-V targets into 32/64-bitYannis Huber
2020-07-08Add new kendryte k210 target definitionYannis Huber
2020-06-08risc-v: add support for 64-bit RISC-V CPUsYannis Huber
2019-07-07all: add HiFive1 rev B board with RISC-V architectureAyke van Laethem