Age | Commit message (Expand) | Author |
---|---|---|
2024-05-24 | LLVM 18 support | Ayke van Laethem |
2024-01-05 | all: statically link to LLVM 17 instead of LLVM 16 | Ayke van Laethem |
2023-09-18 | all: switch to LLVM 16 | Ayke van Laethem |
2022-10-19 | ci: add support for LLVM 15 | Ayke van Laethem |
2022-04-23 | all: update to LLVM 14 | Ayke van Laethem |
2021-11-07 | all: add target-features string to all targets | Ayke van Laethem |
2021-11-03 | targets: add CPU property everywhere | Ayke van Laethem |
2020-07-08 | Changes according to @aykevl's feedback | Yannis Huber |
2020-07-08 | Split RISC-V targets into 32/64-bit | Yannis Huber |
2020-07-08 | Add new kendryte k210 target definition | Yannis Huber |
2020-06-08 | risc-v: add support for 64-bit RISC-V CPUs | Yannis Huber |
2019-07-07 | all: add HiFive1 rev B board with RISC-V architecture | Ayke van Laethem |