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path: root/targets/riscv.json
AgeCommit message (Collapse)Author
2022-06-16compiler: implement recover() built-in functionAyke van Laethem
2022-04-11Also disable asynchronous unwind tablesElliott Sales de Andrade
These seem to be enabled in LLVM 14, and cause undefined symbol errors.
2021-11-07all: add target-features string to all targetsAyke van Laethem
This makes sure that the LLVM target features match the one generated by Clang: - This fixes a bug introduced when setting the target CPU for all targets: Cortex-M4 would now start using floating point operations while they were disabled in C. - This will make it possible in the future to inline C functions in Go and vice versa. This will need some more work though. There is a code size impact. Cortex-M4 targets are increased slightly in binary size while Cortex-M0 targets tend to be reduced a little bit. Other than that, there is little impact.
2021-10-05riscv: switch to tasks-based schedulerAyke van Laethem
This is only supported for RV32 at the moment. RV64 can be added at a later time.
2021-09-28all: use -opt flag for optimization level in CFlags (-Os, etc)Ayke van Laethem
This brings some consistency to the CFlags and fixes the issue that on some platforms (Linux, MacOS), no optimization level was set and therefore C files in packages were not optimized at all.
2021-04-19builder: hard code Clang compilerAyke van Laethem
At the moment, all targets use the Clang compiler to compile C and assembly files. There is no good reason to make this configurable anymore and in fact it will make future changes more complicated (and thus more likely to have bugs). Therefore, I've removed support for setting the compiler. Note that the same is not true for the linker. While it makes sense to standardize on the Clang compiler (because if Clang doesn't support a target, TinyGo is unlikely to support it either), linkers will remain configurable for the foreseeable future. One example is Xtensa, which is supported by the Xtensa LLVM fork but doesn't have support in ld.lld yet. I've also fixed a bug in compileAndCacheCFile: it wasn't using the right CFlags for caching purposes. This could lead to using stale caches. This commit fixes that too.
2021-03-29gdb: enable to specify multiple candidates for gdbsago35
2020-10-02runtime: move/refactor some GC-related codeAyke van Laethem
Instead of putting tinygo_scanCurrentStack in scheduler_*.S files, put them in dedicated files. The function tinygo_scanCurrentStack has nothing to do with scheduling and so doesn't belong there. Additionally, while scheduling code is made specific for the Cortex-M, the tinygo_scanCurrentStack is generic to all ARM targets so this move removes some duplication there. Specifically: * tinygo_scanCurrentStack is moved out of scheduler_cortexm.S as it isn't really part of the scheduler. It is now gc_arm.S. * Same for the AVR target. * Same for the RISCV target. * scheduler_gba.S is removed, using gc_arm.S instead as it only contains tinygo_scanCurrentStack.
2020-07-08riscv: refactor assembly files to support RV64 and F extensionYannis Huber
2020-07-08riscv: fix offset in 64bit schedulerYannis Huber
Also keep common start.S file for 64 and 32 bit architectures.
2020-07-08maixbit (uart): serial is working with echo exampleYannis Huber
2020-07-08Changes according to @aykevl's feedbackYannis Huber
2020-07-08Split RISC-V targets into 32/64-bitYannis Huber
2020-06-08risc-v: add support for 64-bit RISC-V CPUsYannis Huber
2020-04-07runtime (gc): scan callee-saved registers while marking stackJaden Weiss
2020-03-22all: include picolibc for bare metal targetsAyke van Laethem
This is necessary for better CGo support on bare metal. Existing libraries expect to be able to include parts of libc and expect to be able to link to those symbols. Because with this all targets have a working libc, it is now possible to add tests to check that a libc in fact works basically. Not all parts of picolibc are included, such as the math or stdio parts. These should be added later, when needed. This commit also avoids the need for the custom memcpy/memset/memcmp symbols that are sometimes emitted by LLVM. The C library will take care of that.
2019-12-14riscv: add support for compiler-rtAyke van Laethem
This gets all the tests to compile and many of them to pass. There are some issues left, but those are probably unrelated to compiler-rt.
2019-12-07targets: add hifive1-qemu for testing RISC-V bare metal in QEMUAyke van Laethem
Most tests don't pass yet, so can't add this test to the standard tests, yet.
2019-12-07riscv: use LLVM tools instead of GNU toolchainAyke van Laethem
Now that we use LLVM 9, RISC-V support in LLVM has far fewer bugs and we can avoid the GNU toolchain. * replace GNU linker with lld * replace GCC with clang Additionally, RISC-V was promoted to stable so it can be enabled by default in CI.
2019-08-04all: use baremetal build tagAyke van Laethem
This simplifies adding more baremetal targets, like a GameBoy Advance, or baremetal x86 for unikernels.
2019-07-07all: add HiFive1 rev B board with RISC-V architectureAyke van Laethem
This page has been a big help in adding support for this new chip: https://wiki.osdev.org/HiFive-1_Bare_Bones