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author | Andrzej Janik <[email protected]> | 2024-05-06 00:28:49 +0200 |
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committer | GitHub <[email protected]> | 2024-05-06 00:28:49 +0200 |
commit | 27c0e136777a2db49dbb0caa888d561819230493 (patch) | |
tree | 06a395462378d64ed504f3ec0a1b877de12ba98c /ptx/src/test/spirv_run/fma.ll | |
parent | bdc652f9ebcac9a79849eeee84a391a4ac107913 (diff) | |
download | ZLUDA-27c0e136777a2db49dbb0caa888d561819230493.tar.gz ZLUDA-27c0e136777a2db49dbb0caa888d561819230493.zip |
Minor codegen improvements (#225)
Diffstat (limited to 'ptx/src/test/spirv_run/fma.ll')
-rw-r--r-- | ptx/src/test/spirv_run/fma.ll | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/ptx/src/test/spirv_run/fma.ll b/ptx/src/test/spirv_run/fma.ll index 1dff2b8..61ef775 100644 --- a/ptx/src/test/spirv_run/fma.ll +++ b/ptx/src/test/spirv_run/fma.ll @@ -2,14 +2,16 @@ target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:3 target triple = "amdgcn-amd-amdhsa" define protected amdgpu_kernel void @fma(ptr addrspace(4) byref(i64) %"28", ptr addrspace(4) byref(i64) %"29") #0 { -"34": %"9" = alloca i1, align 1, addrspace(5) - store i1 false, ptr addrspace(5) %"9", align 1 %"4" = alloca i64, align 8, addrspace(5) %"5" = alloca i64, align 8, addrspace(5) %"6" = alloca float, align 4, addrspace(5) %"7" = alloca float, align 4, addrspace(5) %"8" = alloca float, align 4, addrspace(5) + br label %1 + +1: ; preds = %0 + store i1 false, ptr addrspace(5) %"9", align 1 %"10" = load i64, ptr addrspace(4) %"28", align 8 store i64 %"10", ptr addrspace(5) %"4", align 8 %"11" = load i64, ptr addrspace(4) %"29", align 8 @@ -20,13 +22,13 @@ define protected amdgpu_kernel void @fma(ptr addrspace(4) byref(i64) %"28", ptr store float %"12", ptr addrspace(5) %"6", align 4 %"15" = load i64, ptr addrspace(5) %"4", align 8 %"31" = inttoptr i64 %"15" to ptr - %"36" = getelementptr inbounds i8, ptr %"31", i64 4 - %"14" = load float, ptr %"36", align 4 + %"35" = getelementptr inbounds i8, ptr %"31", i64 4 + %"14" = load float, ptr %"35", align 4 store float %"14", ptr addrspace(5) %"7", align 4 %"17" = load i64, ptr addrspace(5) %"4", align 8 %"32" = inttoptr i64 %"17" to ptr - %"38" = getelementptr inbounds i8, ptr %"32", i64 8 - %"16" = load float, ptr %"38", align 4 + %"37" = getelementptr inbounds i8, ptr %"32", i64 8 + %"16" = load float, ptr %"37", align 4 store float %"16", ptr addrspace(5) %"8", align 4 %"19" = load float, ptr addrspace(5) %"6", align 4 %"20" = load float, ptr addrspace(5) %"7", align 4 |