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author | Andrzej Janik <[email protected]> | 2024-04-05 23:26:08 +0200 |
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committer | GitHub <[email protected]> | 2024-04-05 23:26:08 +0200 |
commit | 0d9ace247567a07554294dc4653624943334a410 (patch) | |
tree | 0425b01dc5b98be2992d0949a123d8c6159f7a5c /ptx/src/test/spirv_run/reg_local.ll | |
parent | 76bae5f91bf81409b8f592e52a2658d787515fa8 (diff) | |
download | ZLUDA-0d9ace247567a07554294dc4653624943334a410.tar.gz ZLUDA-0d9ace247567a07554294dc4653624943334a410.zip |
Fix buggy carry flags when mixing subc/sub.cc with addc/add.cc (#197)
Diffstat (limited to 'ptx/src/test/spirv_run/reg_local.ll')
-rw-r--r-- | ptx/src/test/spirv_run/reg_local.ll | 46 |
1 files changed, 22 insertions, 24 deletions
diff --git a/ptx/src/test/spirv_run/reg_local.ll b/ptx/src/test/spirv_run/reg_local.ll index c01a5e0..48c881d 100644 --- a/ptx/src/test/spirv_run/reg_local.ll +++ b/ptx/src/test/spirv_run/reg_local.ll @@ -1,37 +1,35 @@ target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7" target triple = "amdgcn-amd-amdhsa" -define protected amdgpu_kernel void @reg_local(ptr addrspace(4) byref(i64) %"24", ptr addrspace(4) byref(i64) %"25") #0 { -"34": +define protected amdgpu_kernel void @reg_local(ptr addrspace(4) byref(i64) %"23", ptr addrspace(4) byref(i64) %"24") #0 { +"33": %"8" = alloca i1, align 1, addrspace(5) store i1 false, ptr addrspace(5) %"8", align 1 - %"9" = alloca i1, align 1, addrspace(5) - store i1 false, ptr addrspace(5) %"9", align 1 %"4" = alloca [8 x i8], align 8, addrspace(5) %"5" = alloca i64, align 8, addrspace(5) %"6" = alloca i64, align 8, addrspace(5) %"7" = alloca i64, align 8, addrspace(5) + %"9" = load i64, ptr addrspace(4) %"23", align 8 + store i64 %"9", ptr addrspace(5) %"5", align 8 %"10" = load i64, ptr addrspace(4) %"24", align 8 - store i64 %"10", ptr addrspace(5) %"5", align 8 - %"11" = load i64, ptr addrspace(4) %"25", align 8 - store i64 %"11", ptr addrspace(5) %"6", align 8 - %"13" = load i64, ptr addrspace(5) %"5", align 8 - %"27" = inttoptr i64 %"13" to ptr addrspace(1) - %"26" = load i64, ptr addrspace(1) %"27", align 8 - store i64 %"26", ptr addrspace(5) %"7", align 8 - %"14" = load i64, ptr addrspace(5) %"7", align 8 - %"19" = add i64 %"14", 1 - %"28" = addrspacecast ptr addrspace(5) %"4" to ptr - store i64 %"19", ptr %"28", align 8 - %"30" = addrspacecast ptr addrspace(5) %"4" to ptr - %"38" = getelementptr inbounds i8, ptr %"30", i64 0 - %"31" = load i64, ptr %"38", align 8 - store i64 %"31", ptr addrspace(5) %"7", align 8 - %"16" = load i64, ptr addrspace(5) %"6", align 8 - %"17" = load i64, ptr addrspace(5) %"7", align 8 - %"32" = inttoptr i64 %"16" to ptr addrspace(1) - %"40" = getelementptr inbounds i8, ptr addrspace(1) %"32", i64 0 - store i64 %"17", ptr addrspace(1) %"40", align 8 + store i64 %"10", ptr addrspace(5) %"6", align 8 + %"12" = load i64, ptr addrspace(5) %"5", align 8 + %"26" = inttoptr i64 %"12" to ptr addrspace(1) + %"25" = load i64, ptr addrspace(1) %"26", align 8 + store i64 %"25", ptr addrspace(5) %"7", align 8 + %"13" = load i64, ptr addrspace(5) %"7", align 8 + %"18" = add i64 %"13", 1 + %"27" = addrspacecast ptr addrspace(5) %"4" to ptr + store i64 %"18", ptr %"27", align 8 + %"29" = addrspacecast ptr addrspace(5) %"4" to ptr + %"37" = getelementptr inbounds i8, ptr %"29", i64 0 + %"30" = load i64, ptr %"37", align 8 + store i64 %"30", ptr addrspace(5) %"7", align 8 + %"15" = load i64, ptr addrspace(5) %"6", align 8 + %"16" = load i64, ptr addrspace(5) %"7", align 8 + %"31" = inttoptr i64 %"15" to ptr addrspace(1) + %"39" = getelementptr inbounds i8, ptr addrspace(1) %"31", i64 0 + store i64 %"16", ptr addrspace(1) %"39", align 8 ret void } |