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-rw-r--r--ptx/src/test/spirv_run/global_array.ll33
1 files changed, 33 insertions, 0 deletions
diff --git a/ptx/src/test/spirv_run/global_array.ll b/ptx/src/test/spirv_run/global_array.ll
new file mode 100644
index 0000000..3a8da01
--- /dev/null
+++ b/ptx/src/test/spirv_run/global_array.ll
@@ -0,0 +1,33 @@
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
+target triple = "amdgcn-amd-amdhsa"
+
+@asdas = protected addrspace(1) externally_initialized global [4 x [2 x i32]] [[2 x i32] [i32 -1, i32 2], [2 x i32] [i32 3, i32 0], [2 x i32] zeroinitializer, [2 x i32] zeroinitializer]
+@foobar = protected addrspace(1) externally_initialized global [4 x [2 x i64]] [[2 x i64] [i64 -1, i64 2], [2 x i64] [i64 3, i64 0], [2 x i64] [i64 ptrtoint (ptr addrspace(1) @asdas to i64), i64 0], [2 x i64] zeroinitializer]
+
+define protected amdgpu_kernel void @global_array(ptr addrspace(4) byref(i64) %"17", ptr addrspace(4) byref(i64) %"18") #0 {
+"22":
+ %"9" = alloca i1, align 1, addrspace(5)
+ store i1 false, ptr addrspace(5) %"9", align 1
+ %"10" = alloca i1, align 1, addrspace(5)
+ store i1 false, ptr addrspace(5) %"10", align 1
+ %"6" = alloca i64, align 8, addrspace(5)
+ %"7" = alloca i64, align 8, addrspace(5)
+ %"8" = alloca i32, align 4, addrspace(5)
+ %0 = alloca i64, align 8, addrspace(5)
+ store i64 ptrtoint (ptr addrspace(1) @foobar to i64), ptr addrspace(5) %0, align 8
+ %"11" = load i64, ptr addrspace(5) %0, align 8
+ store i64 %"11", ptr addrspace(5) %"6", align 8
+ %"12" = load i64, ptr addrspace(4) %"18", align 8
+ store i64 %"12", ptr addrspace(5) %"7", align 8
+ %"14" = load i64, ptr addrspace(5) %"6", align 8
+ %"20" = inttoptr i64 %"14" to ptr addrspace(1)
+ %"13" = load i32, ptr addrspace(1) %"20", align 4
+ store i32 %"13", ptr addrspace(5) %"8", align 4
+ %"15" = load i64, ptr addrspace(5) %"7", align 8
+ %"16" = load i32, ptr addrspace(5) %"8", align 4
+ %"21" = inttoptr i64 %"15" to ptr addrspace(1)
+ store i32 %"16", ptr addrspace(1) %"21", align 4
+ ret void
+}
+
+attributes #0 = { "amdgpu-unsafe-fp-atomics"="true" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "no-trapping-math"="true" "uniform-work-group-size"="true" }