From 96a342e33f221803874ff897f4aa1aa3aae8e71c Mon Sep 17 00:00:00 2001
From: Andrzej Janik <vosen@vosen.pl>
Date: Thu, 1 Oct 2020 18:13:09 +0200
Subject: Implement shr

---
 ptx/src/ptx.lalrpop | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'ptx/src/ptx.lalrpop')

diff --git a/ptx/src/ptx.lalrpop b/ptx/src/ptx.lalrpop
index ba3fc2b..debdae7 100644
--- a/ptx/src/ptx.lalrpop
+++ b/ptx/src/ptx.lalrpop
@@ -439,6 +439,7 @@ Instruction: ast::Instruction<ast::ParsedArgParams<'input>> = {
     InstBra,
     InstCvt,
     InstShl,
+    InstShr,
     InstSt,
     InstRet,
     InstCvta,
@@ -918,6 +919,23 @@ ShlType: ast::ShlType = {
     ".b64" => ast::ShlType::B64,
 };
 
+// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#logic-and-shift-instructions-shr
+InstShr: ast::Instruction<ast::ParsedArgParams<'input>> = {
+    "shr" <t:ShrType> <a:Arg3> => ast::Instruction::Shr(t, a)
+};
+
+ShrType: ast::ShrType = {
+    ".b16" => ast::ShrType::B16,
+    ".b32" => ast::ShrType::B32,
+    ".b64" => ast::ShrType::B64,
+    ".u16" => ast::ShrType::U16,
+    ".u32" => ast::ShrType::U32,
+    ".u64" => ast::ShrType::U64,
+    ".s16" => ast::ShrType::S16,
+    ".s32" => ast::ShrType::S32,
+    ".s64" => ast::ShrType::S64,
+};
+
 // https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-st
 // Warning: NVIDIA documentation is incorrect, you can specify scope only once
 InstSt: ast::Instruction<ast::ParsedArgParams<'input>> = {
-- 
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