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path: root/zluda_rt/src/tests/barycentrics.ptx
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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31833905
// Cuda compilation tools, release 11.8, V11.8.89
// Based on NVVM 7.0.1
//

.version 7.8
.target sm_52
.address_size 64

	// .globl	_Z5startv
.visible .global .align 8 .b8 barycentrics[8];
.visible .global .align 1 .b8 output_buffer1[1];
.visible .global .align 1 .b8 output_buffer2[1];
.visible .global .align 1 .b8 output_buffer3[1];
.visible .global .align 4 .b8 bvh[4];
.visible .global .align 16 .b8 sphere[16];
.visible .global .align 4 .b8 ray[36];
.visible .global .align 8 .b8 launch_index[8];
.visible .global .align 4 .b8 _ZN21rti_internal_typeinfo12barycentricsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.visible .global .align 4 .b8 _ZN21rti_internal_typeinfo3bvhE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.visible .global .align 4 .b8 _ZN21rti_internal_typeinfo6sphereE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.visible .global .align 4 .b8 _ZN21rti_internal_typeinfo3rayE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
.visible .global .align 4 .b8 _ZN21rti_internal_typeinfo12launch_indexE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.visible .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.visible .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.visible .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.visible .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.visible .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.visible .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.visible .global .align 1 .b8 _ZN21rti_internal_typename12barycentricsE[7] = {102, 108, 111, 97, 116, 50, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_typename3bvhE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_typename6sphereE[7] = {102, 108, 111, 97, 116, 52, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_typename3rayE[11] = {111, 112, 116, 105, 120, 58, 58, 82, 97, 121, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_typename12launch_indexE[5] = {105, 110, 116, 50, 0};
.visible .global .align 4 .u32 _ZN21rti_internal_typeenum12barycentricsE = 4919;
.visible .global .align 4 .u32 _ZN21rti_internal_typeenum3bvhE = 4919;
.visible .global .align 4 .u32 _ZN21rti_internal_typeenum6sphereE = 4919;
.visible .global .align 4 .u32 _ZN21rti_internal_typeenum3rayE = 4919;
.visible .global .align 4 .u32 _ZN21rti_internal_typeenum12launch_indexE = 4919;
.visible .global .align 1 .b8 _ZN21rti_internal_semantic12barycentricsE[33] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 114, 116, 84, 114, 105, 97, 110, 103, 108, 101, 66, 97, 114, 121, 99, 101, 110, 116, 114, 105, 99, 115, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_semantic3bvhE[1];
.visible .global .align 1 .b8 _ZN21rti_internal_semantic6sphereE[1];
.visible .global .align 1 .b8 _ZN21rti_internal_semantic3rayE[13] = {114, 116, 67, 117, 114, 114, 101, 110, 116, 82, 97, 121, 0};
.visible .global .align 1 .b8 _ZN21rti_internal_semantic12launch_indexE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.visible .global .align 1 .b8 _ZN23rti_internal_annotation12barycentricsE[1];
.visible .global .align 1 .b8 _ZN23rti_internal_annotation3bvhE[1];
.visible .global .align 1 .b8 _ZN23rti_internal_annotation6sphereE[1];
.visible .global .align 1 .b8 _ZN23rti_internal_annotation3rayE[1];
.visible .global .align 1 .b8 _ZN23rti_internal_annotation12launch_indexE[1];

.visible .entry _Z5startv()
{
	.local .align 1 .b8 	__local_depot0[1];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .b16 	%rs<2>;
	.reg .f32 	%f<9>;
	.reg .b32 	%r<7>;
	.reg .b64 	%rd<3>;


	mov.u64 	%SPL, __local_depot0;
	cvta.local.u64 	%SP, %SPL;
	add.u64 	%rd1, %SP, 0;
	add.u64 	%rd2, %SPL, 0;
	ld.global.u32 	%r6, [launch_index];
	cvt.rn.f32.s32 	%f1, %r6;
	mov.u16 	%rs1, 0;
	st.local.u8 	[%rd2], %rs1;
	ld.global.u32 	%r1, [bvh];
	mov.f32 	%f3, 0fBF800000;
	mov.f32 	%f6, 0f3F800000;
	mov.f32 	%f7, 0f00000000;
	mov.f32 	%f8, 0f6C4ECB8F;
	mov.u32 	%r3, 255;
	mov.u32 	%r4, 0;
	mov.u32 	%r5, 1;
	// begin inline asm
	call _rt_trace_mask_flags_64, (%r1, %f1, %f7, %f3, %f7, %f7, %f6, %r4, %f7, %f8, %r3, %r4, %rd1, %r5);
	// end inline asm
	ret;

}
	// .globl	_Z9intersecti
.visible .entry _Z9intersecti(
	.param .u32 _Z9intersecti_param_0
)
{
	.reg .pred 	%p<5>;
	.reg .f32 	%f<47>;
	.reg .b32 	%r<7>;


	ld.global.v4.f32 	{%f5, %f6, %f7, %f8}, [sphere];
	ld.global.f32 	%f13, [ray];
	sub.f32 	%f14, %f13, %f5;
	ld.global.f32 	%f15, [ray+4];
	sub.f32 	%f16, %f15, %f6;
	ld.global.f32 	%f17, [ray+8];
	sub.f32 	%f18, %f17, %f7;
	ld.global.f32 	%f19, [ray+12];
	ld.global.f32 	%f20, [ray+16];
	mul.f32 	%f21, %f20, %f20;
	fma.rn.f32 	%f22, %f19, %f19, %f21;
	ld.global.f32 	%f23, [ray+20];
	fma.rn.f32 	%f24, %f23, %f23, %f22;
	sqrt.rn.f32 	%f25, %f24;
	rcp.rn.f32 	%f1, %f25;
	mul.f32 	%f26, %f19, %f1;
	mul.f32 	%f27, %f1, %f20;
	mul.f32 	%f28, %f1, %f23;
	mul.f32 	%f29, %f16, %f27;
	fma.rn.f32 	%f30, %f14, %f26, %f29;
	fma.rn.f32 	%f2, %f18, %f28, %f30;
	mul.f32 	%f31, %f16, %f16;
	fma.rn.f32 	%f32, %f14, %f14, %f31;
	fma.rn.f32 	%f33, %f18, %f18, %f32;
	mul.f32 	%f34, %f8, %f8;
	sub.f32 	%f35, %f33, %f34;
	mul.f32 	%f36, %f2, %f2;
	sub.f32 	%f3, %f36, %f35;
	setp.leu.f32 	%p1, %f3, 0f00000000;
	@%p1 bra 	$L__BB1_5;

	sqrt.rn.f32 	%f4, %f3;
	neg.f32 	%f38, %f2;
	sub.f32 	%f39, %f38, %f4;
	add.f32 	%f40, %f39, 0f00000000;
	mul.f32 	%f37, %f1, %f40;
	// begin inline asm
	call (%r1), _rt_potential_intersection, (%f37);
	// end inline asm
	setp.eq.s32 	%p2, %r1, 0;
	@%p2 bra 	$L__BB1_3;

	mov.f32 	%f41, 0f43480000;
	mov.f32 	%f42, 0f42C80000;
	st.global.v2.f32 	[barycentrics], {%f42, %f41};
	mov.u32 	%r3, 0;
	// begin inline asm
	call (%r2), _rt_report_intersection, (%r3);
	// end inline asm
	setp.ne.s32 	%p3, %r2, 0;
	@%p3 bra 	$L__BB1_5;

$L__BB1_3:
	sub.f32 	%f44, %f4, %f2;
	mul.f32 	%f43, %f1, %f44;
	// begin inline asm
	call (%r4), _rt_potential_intersection, (%f43);
	// end inline asm
	setp.eq.s32 	%p4, %r4, 0;
	@%p4 bra 	$L__BB1_5;

	mov.f32 	%f45, 0f43480000;
	mov.f32 	%f46, 0f42C80000;
	st.global.v2.f32 	[barycentrics], {%f46, %f45};
	mov.u32 	%r6, 0;
	// begin inline asm
	call (%r5), _rt_report_intersection, (%r6);
	// end inline asm

$L__BB1_5:
	ret;

}
	// .globl	_Z6boundsiPf
.visible .entry _Z6boundsiPf(
	.param .u32 _Z6boundsiPf_param_0,
	.param .u64 _Z6boundsiPf_param_1
)
{
	.reg .pred 	%p<3>;
	.reg .f32 	%f<17>;
	.reg .b32 	%r<3>;
	.reg .b64 	%rd<3>;


	ld.param.u64 	%rd2, [_Z6boundsiPf_param_1];
	cvta.to.global.u64 	%rd1, %rd2;
	ld.global.v4.f32 	{%f6, %f7, %f8, %f9}, [sphere];
	setp.leu.f32 	%p1, %f9, 0f00000000;
	@%p1 bra 	$L__BB2_2;

	abs.f32 	%f10, %f9;
	setp.neu.f32 	%p2, %f10, 0f7F800000;
	@%p2 bra 	$L__BB2_3;
	bra.uni 	$L__BB2_2;

$L__BB2_3:
	sub.f32 	%f11, %f6, %f9;
	st.global.f32 	[%rd1], %f11;
	sub.f32 	%f12, %f7, %f9;
	st.global.f32 	[%rd1+4], %f12;
	sub.f32 	%f13, %f8, %f9;
	st.global.f32 	[%rd1+8], %f13;
	add.f32 	%f14, %f6, %f9;
	st.global.f32 	[%rd1+12], %f14;
	add.f32 	%f15, %f7, %f9;
	st.global.f32 	[%rd1+16], %f15;
	add.f32 	%f16, %f8, %f9;
	st.global.f32 	[%rd1+20], %f16;
	bra.uni 	$L__BB2_4;

$L__BB2_2:
	mov.u32 	%r1, 2096152002;
	st.global.u32 	[%rd1], %r1;
	st.global.u32 	[%rd1+4], %r1;
	st.global.u32 	[%rd1+8], %r1;
	mov.u32 	%r2, -51331646;
	st.global.u32 	[%rd1+12], %r2;
	st.global.u32 	[%rd1+16], %r2;
	st.global.u32 	[%rd1+20], %r2;

$L__BB2_4:
	ret;

}
	// .globl	_Z17attribute_programv
.visible .entry _Z17attribute_programv()
{
	.reg .f32 	%f<4>;


	// begin inline asm
	call (%f1, %f2), _rt_get_triangle_barycentrics, ();
	// end inline asm
	mov.f32 	%f3, 0f3DCCCCCD;
	st.global.v2.f32 	[barycentrics], {%f1, %f3};
	ret;

}
	// .globl	_Z11closest_hitv
.visible .entry _Z11closest_hitv()
{
	.reg .f32 	%f<7>;
	.reg .b32 	%r<8>;
	.reg .b64 	%rd<22>;


	ld.global.v2.f32 	{%f3, %f4}, [barycentrics];
	mov.u64 	%rd18, 0;
	ld.global.s32 	%rd3, [launch_index];
	mov.u64 	%rd19, output_buffer1;
	cvta.global.u64 	%rd2, %rd19;
	mov.u32 	%r6, 1;
	mov.u32 	%r4, 8;
	// begin inline asm
	call (%rd1), _rt_buffer_get_64, (%rd2, %r6, %r4, %rd3, %rd18, %rd18, %rd18);
	// end inline asm
	st.v2.f32 	[%rd1], {%f3, %f4};
	// begin inline asm
	call (%f1, %f2), _rt_get_triangle_barycentrics, ();
	// end inline asm
	ld.global.s32 	%rd9, [launch_index];
	mov.u64 	%rd20, output_buffer2;
	cvta.global.u64 	%rd8, %rd20;
	// begin inline asm
	call (%rd7), _rt_buffer_get_64, (%rd8, %r6, %r4, %rd9, %rd18, %rd18, %rd18);
	// end inline asm
	st.v2.f32 	[%rd7], {%f1, %f2};
	// begin inline asm
	call (%r5), _rt_get_primitive_index, ();
	// end inline asm
	ld.global.s32 	%rd15, [launch_index];
	mov.u64 	%rd21, output_buffer3;
	cvta.global.u64 	%rd14, %rd21;
	mov.u32 	%r7, 4;
	// begin inline asm
	call (%rd13), _rt_buffer_get_64, (%rd14, %r6, %r7, %rd15, %rd18, %rd18, %rd18);
	// end inline asm
	st.u32 	[%rd13], %r5;
	ret;

}