fix wrong VSIB encoding with idx >= 16v5.68

5 files changed, 12 insertions, 8 deletions

diff --git a/readme.md b/readme.md
index 2c41e82..2a15df5 100644
--- a/readme.md
+++ b/readme.md
@@ -1,5 +1,5 @@
 
-Xbyak 5.67 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
+Xbyak 5.68 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
 =============
 
 Abstract
@@ -329,6 +329,7 @@ http://opensource.org/licenses/BSD-3-Clause
 
 History
 -------------
+* 2018/Aug/24 ver 5.68 fix wrong VSIB encoding with vector index >= 16(thanks to petercaday)
 * 2018/Aug/14 ver 5.67 remove mutable in Address ; fix setCacheHierarchy for cloud vm
 * 2018/Jul/26 ver 5.661 support mingw64
 * 2018/Jul/24 ver 5.66 add CodeArray::PROTECT_RE to mode of protect()
diff --git a/readme.txt b/readme.txt
index 74eb591..a3b6339 100644
--- a/readme.txt
+++ b/readme.txt
@@ -1,5 +1,5 @@
 

-    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.67

+    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.68

 

 -----------------------------------------------------------------------------

 ◎概要

@@ -338,6 +338,7 @@ sample/{echo,hello}.bfは http://www.kmonos.net/alang/etc/brainfuck.php から
 -----------------------------------------------------------------------------

 ◎履歴

 

+2018/08/24 ver 5.68 indexが16以上のVSIBエンコーディングのバグ修正(thanks to petercaday)

 2018/08/14 ver 5.67 Addressクラス内のmutableを削除 ; fix setCacheHierarchy for cloud vm

 2018/07/26 ver 5.661 mingw64対応

 2018/07/24 ver 5.66 protect()のmodeにCodeArray::PROTECT_REを追加

diff --git a/test/make_512.cpp b/test/make_512.cpp
index 408f98b..cf345be 100644
--- a/test/make_512.cpp
+++ b/test/make_512.cpp
@@ -352,7 +352,8 @@ class Test {
 		case VM32Y_K:
 			return isXbyak_ ? "ptr [64+ymm13*2+r13] | k6" : "[64+ymm13*2+r13]{k6}";
 		case VM32Z_K:
-			return isXbyak_ ? "ptr [64+zmm13*2+r13] | k6" : "[64+zmm13*2+r13]{k6}";
+			if (idx & 1) return isXbyak_ ? "ptr [64+zmm10*8+r9] | k6" : "[64+zmm10*8+r9]{k6}";
+			return isXbyak_ ? "ptr [64+zmm30*2+r13] | k6" : "[64+zmm30*2+r13]{k6}";
 		case VM32Z:
 			return isXbyak_ ? "ptr [64+zmm13*2+rcx]" : "[64+zmm13*2+rcx]";
 		case M_1to2: return isXbyak_ ? "ptr_b [eax+32]" : "[eax+32]{1to2}";
diff --git a/xbyak/xbyak.h b/xbyak/xbyak.h
index 87d8519..d4ca5ab 100644
--- a/xbyak/xbyak.h
+++ b/xbyak/xbyak.h
@@ -105,7 +105,7 @@ namespace Xbyak {
 
 enum {
 	DEFAULT_MAX_CODE_SIZE = 4096,
-	VERSION = 0x5670 /* 0xABCD = A.BC(D) */
+	VERSION = 0x5680 /* 0xABCD = A.BC(D) */
 };
 
 #ifndef MIE_INTEGER_TYPE_DEFINED
@@ -1500,7 +1500,7 @@ private:
 		if ((a > 0 && a != v) + (b > 0 && b != v) + (c > 0 && c != v) > 0) return Error(err);
 		return v;
 	}
-	int evex(const Reg& reg, const Reg& base, const Operand *v, int type, int code, bool x = false, bool b = false, int aaa = 0, uint32 VL = 0)
+	int evex(const Reg& reg, const Reg& base, const Operand *v, int type, int code, bool x = false, bool b = false, int aaa = 0, uint32 VL = 0, bool Hi16Vidx = false)
 	{
 		if (!(type & (T_EVEX | T_MUST_EVEX))) throw Error(ERR_EVEX_IS_INVALID);
 		int w = (type & T_EW1) ? 1 : 0;
@@ -1543,7 +1543,7 @@ private:
 				}
 			}
 		}
-		bool Vp = !(v ? v->isExtIdx2() : 0);
+		bool Vp = !((v ? v->isExtIdx2() : 0) | Hi16Vidx);
 		bool z = reg.hasZero() || base.hasZero() || (v ? v->hasZero() : false);
 		if (aaa == 0) aaa = verifyDuplicate(base.getOpmaskIdx(), reg.getOpmaskIdx(), (v ? v->getOpmaskIdx() : 0), ERR_OPMASK_IS_ALREADY_SET);
 		db(0x62);
@@ -1947,7 +1947,8 @@ private:
 					b = true;
 				}
 				int VL = regExp.isVsib() ? regExp.getIndex().getBit() : 0;
-				disp8N = evex(r, base, p1, type, code, x, b, aaa, VL);
+				bool Hi16Vidx = regExp.getIndex().getIdx() >= 16;
+				disp8N = evex(r, base, p1, type, code, x, b, aaa, VL, Hi16Vidx);
 			} else {
 				vex(r, base, p1, type, code, x);
 			}
diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h
index 9de558d..60b6187 100644
--- a/xbyak/xbyak_mnemonic.h
+++ b/xbyak/xbyak_mnemonic.h
@@ -1,4 +1,4 @@
-const char *getVersionString() const { return "5.67"; }
+const char *getVersionString() const { return "5.68"; }
 void adc(const Operand& op, uint32 imm) { opRM_I(op, imm, 0x10, 2); }
 void adc(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x10); }
 void adcx(const Reg32e& reg, const Operand& op) { opGen(reg, op, 0xF6, 0x66, isREG32_REG32orMEM, NONE, 0x38); }