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| author | MITSUNARI Shigeo <[email protected]> | 2023-12-27 11:09:35 +0900 |
|---|---|---|
| committer | MITSUNARI Shigeo <[email protected]> | 2023-12-27 11:09:35 +0900 |
| commit | 0750873b7f4b28f705375149a5d5fc28c12edd04 (patch) | |
| tree | d7c830461469b7d146e6d6eb83a70879d4f19a27 /gen | |
| parent | ee4984222677fa293bfe4ffc25f77abd11f62906 (diff) | |
| download | xbyak-0750873b7f4b28f705375149a5d5fc28c12edd04.tar.gz xbyak-0750873b7f4b28f705375149a5d5fc28c12edd04.zip | |
T_MAP3 is not necessary
Diffstat (limited to 'gen')
| -rw-r--r-- | gen/avx_type.hpp | 1 | ||||
| -rw-r--r-- | gen/avx_type_def.h | 2 | ||||
| -rw-r--r-- | gen/gen_code.cpp | 2 |
3 files changed, 2 insertions, 3 deletions
diff --git a/gen/avx_type.hpp b/gen/avx_type.hpp index a24a0a0..6fa11f4 100644 --- a/gen/avx_type.hpp +++ b/gen/avx_type.hpp @@ -64,7 +64,6 @@ std::string type2String(uint64_t type) if (type & T_MEM_EVEX) str += "|T_MEM_EVEX"; if (type & T_NF) str += "|T_NF"; if (type & T_CODE1_IF1) str += "|T_CODE1_IF1"; - if (type & T_MAP3) str += "|T_MAP3"; if (type & T_ND1) str += "|T_ND1"; if (type & T_ZU) str += "|T_ZU"; diff --git a/gen/avx_type_def.h b/gen/avx_type_def.h index 41b2aa5..9a4d9b6 100644 --- a/gen/avx_type_def.h +++ b/gen/avx_type_def.h @@ -43,7 +43,7 @@ static const uint64_t T_MAP6 = T_FP16 | T_0F38; static const uint64_t T_NF = 1ull << 32; // T_nf static const uint64_t T_CODE1_IF1 = 1ull << 33; // code|=1 if !r.isBit(8) - static const uint64_t T_MAP3 = 1ull << 34; // rorx only + static const uint64_t T_ND1 = 1ull << 35; // ND=1 static const uint64_t T_ZU = 1ull << 36; // ND=ZU static const uint64_t T_F2 = 1ull << 37; // pp = 3 diff --git a/gen/gen_code.cpp b/gen/gen_code.cpp index 13b9ab6..84e5804 100644 --- a/gen/gen_code.cpp +++ b/gen/gen_code.cpp @@ -1831,7 +1831,7 @@ void put() const Tbl& p = tbl[i]; printf("void %s(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, %s, 0x%x); }\n", p.name, type2String(p.type).c_str(), p.code); } - puts("void rorx(const Reg32e& r, const Operand& op, uint8_t imm) { opRRO(r, Reg32e(0, r.getBit()), op, T_0F3A|T_F2|T_APX|T_MAP3, 0xF0, imm); }"); + puts("void rorx(const Reg32e& r, const Operand& op, uint8_t imm) { opRRO(r, Reg32e(0, r.getBit()), op, T_0F3A|T_F2|T_APX, 0xF0, imm); }"); } // gpr(reg, r/m) { |