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authorMITSUNARI Shigeo <[email protected]>2023-02-17 12:03:44 +0900
committerMITSUNARI Shigeo <[email protected]>2023-02-17 12:03:44 +0900
commit363bbaa57d4640be4dfa1d1541f557dd235dbe93 (patch)
treef159ba094b6c591544410c43d10caa73f00d3f41 /sample
parentedce727092cee5257bfee100f6ae2e6894fdcdf9 (diff)
downloadxbyak-363bbaa57d4640be4dfa1d1541f557dd235dbe93.tar.gz
xbyak-363bbaa57d4640be4dfa1d1541f557dd235dbe93.zip
sample shows cpu cache info for AMD
Diffstat (limited to 'sample')
-rw-r--r--sample/test_util.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/sample/test_util.cpp b/sample/test_util.cpp
index 96e9d21..e011783 100644
--- a/sample/test_util.cpp
+++ b/sample/test_util.cpp
@@ -127,7 +127,6 @@ void putCPUinfo(bool onlyCpuidFeature)
Core i7-3930K 6 2D
*/
cpu.putFamily();
- if (!cpu.has(Cpu::tINTEL)) return;
for (unsigned int i = 0; i < cpu.getDataCacheLevels(); i++) {
printf("cache level=%u data cache size=%u cores sharing data cache=%u\n", i, cpu.getDataCacheSize(i), cpu.getCoresSharingDataCache(i));
}