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| author | Yang Liu <[email protected]> | 2024-02-17 18:22:03 +0800 |
|---|---|---|
| committer | Merry <[email protected]> | 2024-03-02 19:38:46 +0000 |
| commit | 09c6f22da9154065e8523dd984bca22222372be4 (patch) | |
| tree | 77e11196d5c2cba1ed4f7e9216f6e3fbb268dec2 | |
| parent | f6e02048f5989ffea46f7802df535b8e3f537f4d (diff) | |
| download | dynarmic-09c6f22da9154065e8523dd984bca22222372be4.tar.gz dynarmic-09c6f22da9154065e8523dd984bca22222372be4.zip | |
backend/rv64: Implement GetNZCVFromOp
| -rw-r--r-- | src/dynarmic/backend/riscv64/emit_riscv64.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/dynarmic/backend/riscv64/emit_riscv64.cpp b/src/dynarmic/backend/riscv64/emit_riscv64.cpp index 54eb73c1..0aae01f0 100644 --- a/src/dynarmic/backend/riscv64/emit_riscv64.cpp +++ b/src/dynarmic/backend/riscv64/emit_riscv64.cpp @@ -51,6 +51,12 @@ void EmitIR<IR::Opcode::GetCarryFromOp>(biscuit::Assembler&, EmitContext& ctx, I } template<> +void EmitIR<IR::Opcode::GetNZCVFromOp>(biscuit::Assembler&, EmitContext& ctx, IR::Inst* inst) { + [[maybe_unused]] auto args = ctx.reg_alloc.GetArgumentInfo(inst); + ASSERT(ctx.reg_alloc.IsValueLive(inst)); +} + +template<> void EmitIR<IR::Opcode::GetNZFromOp>(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); |