diff options
| author | Merry <[email protected]> | 2022-08-16 12:14:11 +0100 |
|---|---|---|
| committer | merry <[email protected]> | 2022-10-18 15:04:30 +0100 |
| commit | 1d6004707892ee0ad8aaf94d157939a7e8e09ce4 (patch) | |
| tree | 6b2ea810126283bd2a75e4de96b957768f357790 | |
| parent | d90e0db50280d5b58cf41f5e949c86251c2077ee (diff) | |
| download | dynarmic-1d6004707892ee0ad8aaf94d157939a7e8e09ce4.tar.gz dynarmic-1d6004707892ee0ad8aaf94d157939a7e8e09ce4.zip | |
a32_interface: Temporary implementation of ranged cache invalidation
| -rw-r--r-- | src/dynarmic/backend/arm64/a32_interface.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/dynarmic/backend/arm64/a32_interface.cpp b/src/dynarmic/backend/arm64/a32_interface.cpp index 69e65abb..3c850cdd 100644 --- a/src/dynarmic/backend/arm64/a32_interface.cpp +++ b/src/dynarmic/backend/arm64/a32_interface.cpp @@ -175,7 +175,11 @@ private: } if (!invalid_cache_ranges.empty()) { - ASSERT_FALSE("Unimplemented"); + // TODO: Optimize + current_address_space.ClearCache(); + + invalid_cache_ranges.clear(); + return; } } |