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author | Yang Liu <[email protected]> | 2024-02-19 14:00:52 +0800 |
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committer | Merry <[email protected]> | 2024-03-02 19:38:46 +0000 |
commit | 6142db864714572ebab318b71b09f5403352c6b1 (patch) | |
tree | 3715fd457466831a7c42c82832e063220c64d851 | |
parent | 483dcba9b65eadca292446251a3106729a2b32e7 (diff) | |
download | dynarmic-6142db864714572ebab318b71b09f5403352c6b1.tar.gz dynarmic-6142db864714572ebab318b71b09f5403352c6b1.zip |
backend/rv64: Implement GetCFlagFromNZCV
-rw-r--r-- | src/dynarmic/backend/riscv64/emit_riscv64.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/dynarmic/backend/riscv64/emit_riscv64.cpp b/src/dynarmic/backend/riscv64/emit_riscv64.cpp index 32a5506b..f9302821 100644 --- a/src/dynarmic/backend/riscv64/emit_riscv64.cpp +++ b/src/dynarmic/backend/riscv64/emit_riscv64.cpp @@ -93,8 +93,15 @@ void EmitIR<IR::Opcode::GetLowerFromOp>(biscuit::Assembler&, EmitContext&, IR::I } template<> -void EmitIR<IR::Opcode::GetCFlagFromNZCV>(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); +void EmitIR<IR::Opcode::GetCFlagFromNZCV>(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) { + auto args = ctx.reg_alloc.GetArgumentInfo(inst); + + auto Xc = ctx.reg_alloc.WriteX(inst); + auto Xnzcv = ctx.reg_alloc.ReadX(args[0]); + RegAlloc::Realize(Xc, Xnzcv); + + as.LUI(Xscratch0, 0x20000); + as.AND(Xc, Xnzcv, Xscratch0); } template<> |