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author | Merry <[email protected]> | 2024-01-28 10:55:59 +0000 |
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committer | Merry <[email protected]> | 2024-01-28 10:55:59 +0000 |
commit | c67f38b57ecc8b1d3c6a7db571a0827f279ff31a (patch) | |
tree | de706ae34699d4a493de02b867cabf09ffa6a284 | |
parent | f8e38809e97d54ec9fa9bcf4414da172a31834ae (diff) | |
download | dynarmic-c67f38b57ecc8b1d3c6a7db571a0827f279ff31a.tar.gz dynarmic-c67f38b57ecc8b1d3c6a7db571a0827f279ff31a.zip |
backend/arm64: FPVectorRoundInt{32,64}: FPCR comparisons should be made with fpcr_controlled when under scope of MaybeStandardFPSCRValue
-rw-r--r-- | src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp b/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp index 2a92ada2..e0a53bf9 100644 --- a/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp +++ b/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp @@ -613,7 +613,7 @@ void EmitIR<IR::Opcode::FPVectorRoundInt32>(oaknut::CodeGenerator& code, EmitCon MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] { if (exact) { - ASSERT(ctx.FPCR().RMode() == rounding_mode); + ASSERT(ctx.FPCR(fpcr_controlled).RMode() == rounding_mode); code.FRINTX(Qresult->S4(), Qoperand->S4()); } else { switch (rounding_mode) { @@ -653,7 +653,7 @@ void EmitIR<IR::Opcode::FPVectorRoundInt64>(oaknut::CodeGenerator& code, EmitCon MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] { if (exact) { - ASSERT(ctx.FPCR().RMode() == rounding_mode); + ASSERT(ctx.FPCR(fpcr_controlled).RMode() == rounding_mode); code.FRINTX(Qresult->D2(), Qoperand->D2()); } else { switch (rounding_mode) { |