diff options
| -rw-r--r-- | src/dynarmic/backend/riscv64/emit_riscv64.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/dynarmic/backend/riscv64/emit_riscv64.cpp b/src/dynarmic/backend/riscv64/emit_riscv64.cpp index 54eb73c1..0aae01f0 100644 --- a/src/dynarmic/backend/riscv64/emit_riscv64.cpp +++ b/src/dynarmic/backend/riscv64/emit_riscv64.cpp @@ -51,6 +51,12 @@ void EmitIR<IR::Opcode::GetCarryFromOp>(biscuit::Assembler&, EmitContext& ctx, I } template<> +void EmitIR<IR::Opcode::GetNZCVFromOp>(biscuit::Assembler&, EmitContext& ctx, IR::Inst* inst) { + [[maybe_unused]] auto args = ctx.reg_alloc.GetArgumentInfo(inst); + ASSERT(ctx.reg_alloc.IsValueLive(inst)); +} + +template<> void EmitIR<IR::Opcode::GetNZFromOp>(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); |