| Age | Commit message (Expand) | Author |
|---|
| 2024-03-02 | backend/rv64: Implement basic LogicalShiftRight32 | Yang Liu |
| 2024-03-02 | backend/rv64: Stub all IR instruction implementations | Yang Liu |
| 2024-03-02 | backend/rv64: Implement A32SetCpsrNZCV | Yang Liu |
| 2024-03-02 | backend/rv64: Implement GetNZCVFromOp | Yang Liu |
| 2024-03-02 | backend/rv64: Implement basic Sub32 | Yang Liu |
| 2024-03-02 | backend/rv64: Implement Identity | Yang Liu |
| 2024-03-02 | backend/rv64: Initial implementation of terminals | Yang Liu |
| 2024-03-02 | backend/rv64: Add StackLayout to stack | Yang Liu |
| 2024-03-02 | backend/rv64: Implement UpdateAllUses | Yang Liu |
| 2024-03-02 | backend/rv64: Implement AssertNoMoreUses and some minor tweaks | Yang Liu |
| 2024-03-02 | backend/rv64: Use biscuit LI() | Yang Liu |
| 2024-03-02 | backend/rv64: Add minimal toy implementation enough to execute LSLS | Yang Liu |
| 2024-03-02 | backend/rv64: Initial implementation of register allocator | Yang Liu |
| 2024-03-02 | backend/rv64: Adjust how relocations are stored | Yang Liu |
| 2024-03-02 | backend/rv64: Rework on pointer types | Yang Liu |
| 2024-03-02 | backend/rv64: Add a dummy code generation | Yang Liu |
| 2024-03-02 | backend/rv64: Add biscuit as the assembler | Yang Liu |
| 2024-03-02 | backend/rv64: Add initial RISC-V framework | Yang Liu |
| 2024-03-02 | Change Config to make fastmem_pointer of zero valid. | Ash |
| 2024-02-24 | emit_x64_vector: Implement AVX2 AVShift64 | zmt00 |
| 2024-02-24 | emit_x64_vector: Refactor AVX2 AVShift32, LVShift{32,64} | zmt00 |
| 2024-02-20 | emit_x64_vector: Implement AVX2 UnsignedRoundingShiftLeft{32,64} | zmt00 |
| 2024-02-17 | emit_x64_vector: Refactor pre-SSE4.1 min/max instruction replacements | zmt00 |
| 2024-02-13 | emit_x64_vector: Optimize VectorSignedSaturatedAbs | zmt00 |
| 2024-02-13 | backend/arm64: A64: Implement DumpDisassembly | Merry |
| 2024-02-13 | emit_arm64_a64: Take into account currently loaded FPSR | Merry |
| 2024-02-10 | backend/x64: Reduce races on invalidation requests in interface | Merry |
| 2024-02-10 | emit_x64_vector: AVX512+GNFI implementation of EmitVectorLogicalVShift8 | Wunkolo |
| 2024-02-10 | ir: Implement FPMulSub | zmt00 |
| 2024-02-06 | emit_x64_vector: GNFI implementation of EmitVectorCountLeadingZeros8 | Wunkolo |
| 2024-01-31 | emit_x64_data_processing: Exclude edge case from lea path in EmitSub | Merry |
| 2024-01-30 | constant_propagation_pass: x + 0 == x | Merry |
| 2024-01-30 | emit_x64_data_processing: Emit lea where possible in EmitAdd and EmitSub | Merry |
| 2024-01-30 | Avoid emplace. | Merry |
| 2024-01-30 | emit_x64_vector: Improve AVX512 implementation of EmitVectorTableLookup128 | Merry |
| 2024-01-30 | emit_x64_vector: Fix AVX-512 implementation of EmitVectorTableLookup64 | Merry |
| 2024-01-29 | emit_x64_crc32: Correct use of x64 crc32 instruction | Merry |
| 2024-01-28 | emit_x64_vector: Implement PairedMinMax{Lower}8 | zmt00 |
| 2024-01-28 | externals: Update oaknut to 2.0.1 | Merry |
| 2024-01-28 | backend/arm64: Update for oaknut 2.0.0. | Merry |
| 2024-01-28 | A32: Implement VCVT{A,N,P,M} (ASIMD) | Merry |
| 2024-01-28 | A32: Correct function naming convention for VRINT{N,X,A,Z,M,P} (ASIMD) | Merry |
| 2024-01-28 | backend/arm64: FPVectorRoundInt{32,64}: FPCR comparisons should be made with ... | Merry |
| 2024-01-28 | A32: Implement VRINT{N,X,A,Z,M,P} (ASIMD) | Merry |
| 2024-01-27 | arm64: Fix compiling under MSYS2 CLANGARM64. | Steveice10 |
| 2024-01-23 | Refactor `Xmm{B}Const` to `{,B}Const` | Wunkolo |
| 2024-01-23 | block_of_code: Add `XmmBConst` | Wunkolo |
| 2024-01-23 | block_of_code: Rename `MConst` to `XmmConst` | Wunkolo |
| 2024-01-23 | emit_x64_vector: Optimize VectorSignedAbsoluteDifference | zmt00 |
| 2024-01-13 | decoder/arm: Improve performance of arm decoding by adding LUT | Merry |
