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AgeCommit message (Expand)Author
2021-06-06A64/config.h: Split fastmem and page_table options.Markus Wick
2021-05-31tests: Format to clang-format mandated styleMerryMage
2021-05-31github: Add build-and-test workflowmerry
2021-05-28unit tests & various fixesJeremy Van de woestyne
2021-05-28tests/A64: Add VQADD/VQSUB unit testsWunkolo
2021-05-24cpu_info: Add CPU Name, Family, compact outputWunkolo
2021-05-22emit_x64_vector: AVX512VBMI implementation of EmitVectorTableLookup128Wunkolo
2021-05-22tests/A64: Add TBL/TBX instruction unit testsWunkolo
2021-05-22Add .clang-format fileMerryMage
2021-05-22A32: Introduce PreCodeTranslationHookMerryMage
2021-05-19Consolidate all source files into src/ directoryMerry
2021-05-16decoder_tests: Only run ASIMD decoder test explicitlyMerryMage
2021-05-16emit_x64_vector: AVX512 Implementation of EmitVectorNarrow{32,64}Wunkolo
2021-05-13thumb32: Add coprocessor instructionsMerryMage
2021-05-07print_info: Add thumb modeMerryMage
2021-05-04thumb32: Implement MRS (register)MerryMage
2021-05-04T32: Add ASIMD instructionsMerryMage
2021-05-04T32: Add VFP instructionsMerryMage
2021-05-04A32: Merge ArmTranslateVistor and ThumbTranslateVisitorMerryMage
2021-05-01rsqrt_test: Fix on GCCMerryMage
2021-04-26fuzz_with_unicorn: Widen scope of floating point fuzzingMerryMage
2021-04-26emit_x64_floating_point: Optimize 32-bit EmitFPRSqrtEstimateMerryMage
2021-04-21ir: Reorganize to new top level folderMerryMage
2021-04-19thumb32: Implement exclusive loadsLioncash
2021-04-10thumb32: Implement STREX variantsLioncash
2021-02-17fixed data + instruction cache callbacks (w/ tests)emuplz
2021-02-17implemented other ic instructionsrufi
2021-02-17added support for instruction ic ivauemuplz
2021-02-07A32/thumb16: Implement IT instructionMerryMage
2021-02-07fuzz_arm: Correctly print thumb instruction listingMerryMage
2021-02-07testenv: Ignore warning C4309MerryMage
2021-02-06a32_unicorn: Halt when PC leaves code_memMerryMage
2021-02-06fuzz_arm: Add fuzzing for thumb instructionsMerryMage
2021-02-01thumb32: Implement SHSUB8/UHSUB8Lioncash
2021-02-01thumb32: Implement SHADD8/UHADD8Lioncash
2021-02-01thumb32: Implement SHSUB16/UHSUB16Lioncash
2021-02-01thumb32: Implement SHSAX/UHSAXLioncash
2021-02-01thumb32: Implement SHASX/UHASXLioncash
2021-02-01thumb32: Implement SHADD16/UHADD16Lioncash
2021-02-01thumb32: Implement QSUB8/UQSUB8Lioncash
2021-02-01thumb32: Implement QADD8/UQADD8Lioncash
2021-02-01thumb32: Implement QSUB16/UQSUB16Lioncash
2021-02-01thumb32: Implement QSAX/UQSAXLioncash
2021-02-01thumb32: Implement QASX/UQASXLioncash
2021-02-01thumb32: Implement QADD16/UQADD16Lioncash
2021-02-01thumb32: Implement SSUB8/USUB8Lioncash
2021-02-01thumb32: Implement SADD8/UADD8Lioncash
2021-02-01thumb32: Implement SSUB16/USUB16Lioncash
2021-02-01thumb32: Implement SSAX/USAXLioncash
2021-02-01thumb32: Implement SASX/UASXLioncash
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