diff options
| author | Yannis Huber <[email protected]> | 2020-07-04 15:13:44 +0200 |
|---|---|---|
| committer | Ron Evans <[email protected]> | 2020-07-08 00:21:59 +0200 |
| commit | 5ff76aacabb3cadefde8995a11fb4a12e8acedd0 (patch) | |
| tree | 049a7cefec0e8170b3bb458c3e13bd784ab36a0f /src/runtime/arch_tinygoriscv64.go | |
| parent | 3ee7599a098cbaef0f45b127f1560f472d66ef37 (diff) | |
| download | tinygo-5ff76aacabb3cadefde8995a11fb4a12e8acedd0.tar.gz tinygo-5ff76aacabb3cadefde8995a11fb4a12e8acedd0.zip | |
runtime: reuse common code between 32 and 64-bit RISC-V
Diffstat (limited to 'src/runtime/arch_tinygoriscv64.go')
| -rw-r--r-- | src/runtime/arch_tinygoriscv64.go | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/runtime/arch_tinygoriscv64.go b/src/runtime/arch_tinygoriscv64.go index f17e1dfd2..a4a8c14f0 100644 --- a/src/runtime/arch_tinygoriscv64.go +++ b/src/runtime/arch_tinygoriscv64.go @@ -2,8 +2,6 @@ package runtime -import "device/riscv" - const GOARCH = "arm64" // riscv pretends to be arm // The bitness of the CPU (e.g. 8, 32, 64). @@ -13,7 +11,3 @@ const TargetBits = 64 func align(ptr uintptr) uintptr { return (ptr + 7) &^ 7 } - -func getCurrentStackPointer() uintptr { - return riscv.AsmFull("mv {}, sp", nil) -} |