Add RP2350 support (#4459)

machine/rp2350: add support

* add linker scripts for rp2350
* add bootloader
* begin melding rp2040 and rp2350 APIs
* add UART
* add rp2350 boot patching
* Fix RP2350 memory layout (#4626)
* Remove rp2040-style second stage bootloader.
* Add 'minimum viable' IMAGE_DEF embedded block
* Create a pico2 specific target
* Implement rp2350 init, clock, and uart support
* Merge rp2 reset code back together
* Separate chip-specific clock definitions
* Clear pad isolation bit on rp2350
* Init UART in rp2350 runtime
* Correct usb/serial initialization order
* Implement jump-to-bootloader
* test: add pico2 to smoketests

---------

Signed-off-by: deadprogram <[email protected]>
Co-authored-by: Matthew Mets <[email protected]>
Co-authored-by: Matt Mets <[email protected]>
Co-authored-by: deadprogram <[email protected]>

1 files changed, 23 insertions, 0 deletions

diff --git a/targets/rp2350.ld b/targets/rp2350.ld
new file mode 100644
index 000000000..dbe495cf7
--- /dev/null
+++ b/targets/rp2350.ld
@@ -0,0 +1,23 @@
+/* See Rust for a more complete reference: https://github.com/rp-rs/rp-hal/blob/main/rp235x-hal-examples/memory.x */
+MEMORY
+{
+   /* 2MiB safe default.  */
+    FLASH : ORIGIN = 0x10000000, LENGTH = 2048k
+    /* RAM consists of 8 banks, SRAM0..SRAM7 with striped mapping. */
+    SRAM : ORIGIN = 0x20000000, LENGTH = 512k
+    /* Banks 8 and 9 use direct mapping which can be
+       specailized for applications where predictable access time is beneficial.
+       i.e: Separate stacks for core0 and core1. */
+    SRAM4 : ORIGIN = 0x20080000, LENGTH = 4k
+    SRAM5 : ORIGIN = 0x20081000, LENGTH = 4k
+    FLASH_TEXT (rx) : ORIGIN = 0x10000000, LENGTH = 2048k
+    RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 512k
+}
+
+_stack_size = 2K;
+
+SECTIONS
+{
+}
+
+INCLUDE "targets/arm.ld"