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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn-amd-amdhsa"
declare void @__zluda_ptx_impl____assertfail(i64, i64, i32, i64, i64) #0
define protected amdgpu_kernel void @assertfail(ptr addrspace(4) byref(i64) %"62", ptr addrspace(4) byref(i64) %"63") #1 {
"81":
%"35" = alloca i1, align 1, addrspace(5)
store i1 false, ptr addrspace(5) %"35", align 1
%"15" = alloca i64, align 8, addrspace(5)
%"16" = alloca i64, align 8, addrspace(5)
%"17" = alloca i64, align 8, addrspace(5)
%"18" = alloca i64, align 8, addrspace(5)
%"19" = alloca i32, align 4, addrspace(5)
%"64" = alloca i64, align 8, addrspace(5)
%"66" = alloca i64, align 8, addrspace(5)
%"68" = alloca i32, align 4, addrspace(5)
%"70" = alloca i64, align 8, addrspace(5)
%"72" = alloca i64, align 8, addrspace(5)
%"36" = load i64, ptr addrspace(4) %"62", align 8
store i64 %"36", ptr addrspace(5) %"15", align 8
%"37" = load i64, ptr addrspace(4) %"63", align 8
store i64 %"37", ptr addrspace(5) %"16", align 8
%0 = alloca i32, align 4, addrspace(5)
store i32 0, ptr addrspace(5) %0, align 4
%"74" = load i32, ptr addrspace(5) %0, align 4
store i32 %"74", ptr addrspace(5) %"19", align 4
%"39" = load i64, ptr addrspace(5) %"15", align 8
%"83" = getelementptr inbounds i8, ptr addrspace(5) %"64", i64 0
store i64 %"39", ptr addrspace(5) %"83", align 8
%"40" = load i64, ptr addrspace(5) %"15", align 8
%"85" = getelementptr inbounds i8, ptr addrspace(5) %"66", i64 0
store i64 %"40", ptr addrspace(5) %"85", align 8
%"41" = load i32, ptr addrspace(5) %"19", align 4
%"87" = getelementptr inbounds i8, ptr addrspace(5) %"68", i64 0
store i32 %"41", ptr addrspace(5) %"87", align 4
%"42" = load i64, ptr addrspace(5) %"15", align 8
%"89" = getelementptr inbounds i8, ptr addrspace(5) %"70", i64 0
store i64 %"42", ptr addrspace(5) %"89", align 8
%"43" = load i64, ptr addrspace(5) %"15", align 8
%"91" = getelementptr inbounds i8, ptr addrspace(5) %"72", i64 0
store i64 %"43", ptr addrspace(5) %"91", align 8
%"30" = load i64, ptr addrspace(5) %"64", align 8
%"31" = load i64, ptr addrspace(5) %"66", align 8
%"32" = load i32, ptr addrspace(5) %"68", align 4
%"33" = load i64, ptr addrspace(5) %"70", align 8
%"34" = load i64, ptr addrspace(5) %"72", align 8
call void @__zluda_ptx_impl____assertfail(i64 %"30", i64 %"31", i32 %"32", i64 %"33", i64 %"34")
%"45" = load i64, ptr addrspace(5) %"15", align 8
%"79" = inttoptr i64 %"45" to ptr
%"44" = load i64, ptr %"79", align 8
store i64 %"44", ptr addrspace(5) %"17", align 8
%"47" = load i64, ptr addrspace(5) %"17", align 8
%"46" = add i64 %"47", 1
store i64 %"46", ptr addrspace(5) %"18", align 8
%"48" = load i64, ptr addrspace(5) %"16", align 8
%"49" = load i64, ptr addrspace(5) %"18", align 8
%"80" = inttoptr i64 %"48" to ptr
store i64 %"49", ptr %"80", align 8
ret void
}
attributes #0 = { "amdgpu-unsafe-fp-atomics"="true" "no-trapping-math"="true" "uniform-work-group-size"="true" }
attributes #1 = { "amdgpu-unsafe-fp-atomics"="true" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "no-trapping-math"="true" "uniform-work-group-size"="true" }
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