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authorReinUsesLisp <[email protected]>2019-12-09 21:44:36 -0300
committerReinUsesLisp <[email protected]>2019-12-09 21:44:36 -0300
commit12f40a80324d7c154f19f25c448a5ce27d38cd18 (patch)
treea0b7f6e3088216229f476bff88b10816427c28ed /include
parente1a6729df7f11e33f6dc0939b18995a57c8bf3d8 (diff)
downloadsirit-12f40a80324d7c154f19f25c448a5ce27d38cd18.tar.gz
sirit-12f40a80324d7c154f19f25c448a5ce27d38cd18.zip
Add OpMemoryBarrier
Diffstat (limited to 'include')
-rw-r--r--include/sirit/sirit.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/sirit/sirit.h b/include/sirit/sirit.h
index aa6b976..a6d267d 100644
--- a/include/sirit/sirit.h
+++ b/include/sirit/sirit.h
@@ -364,6 +364,11 @@ public:
/// Finish the current primitive and start a new one. No vertex is emitted.
Id OpEndPrimitive();
+ // Barrier
+
+ /// Control the order that memory accesses are observed.
+ Id OpMemoryBarrier(Id scope, Id semantics);
+
// Logical
/// Result is true if any component of Vector is true, otherwise result is false.